ekeeke
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a2380d84e0
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[Core/VDP] fixed address/code potential corruption by one-instruction execution delay after HV interrupts activation (fixes #477)
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2023-01-13 14:00:27 +01:00 |
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ekeeke
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dded47d5e7
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[Core/VDP] added support for background color changes during HBLANK when display is disabled (fixes #462)
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2022-09-19 14:11:16 +02:00 |
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EkeEke
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38ffc317cb
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[Core/VDP] improved FIFO emulation accuracy
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2017-06-05 23:52:03 +02:00 |
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EkeEke
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f49980abed
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[Core/VDP] fixed spurious 8K-16K VRAM switching when reloading SG-1000 context + minor optimizations
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2016-02-28 22:42:19 +01:00 |
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EkeEke
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e8b72612b4
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[Core/VDP] confirmed register $0A default state on reset
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2015-08-26 23:29:43 +02:00 |
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EkeEke
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ec554b4b70
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[Core/General] rewrote frame emulation timing, now starts with vertical blanking to reduce input lag by one more frame (warning: this breaks compatibility with previous savestates)
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2014-12-14 17:10:15 +01:00 |
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EkeEke
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10e5a924df
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[Core/MS] improved Z80 address decoding on Japanese Master System I/O chip (315-5297)
[Core/GG] modified VDP register 10 state on reset (fixes Terminator 2: Judgment Day)
[Core/SG] added support for SG-1000 II clone hardware (2KB RAM + integrated VDP/PSG chip 315-5066)
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2014-03-02 16:07:08 +01:00 |
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EkeEke
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8a813b0ecb
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[Core/VDP] implemented proper FIFO ring-buffer & unused bits behavior on CRAM/VSRAM reads (verified on real hardware)
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2013-10-20 23:48:36 +02:00 |
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EkeEke
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42ea79cf73
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[Core/VDP] improved Mode 5 sprites rendering (fixes "Overdrive" demo)
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2013-10-20 20:53:33 +02:00 |
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EkeEke
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cbf8f4ed2a
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[Core/VDP] improved FIFO timings accuracy (fixes "Overdrive" Demo)
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2013-10-20 20:41:44 +02:00 |
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EkeEke
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aede1b9299
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rearranged core & back-end specific code (part 2)
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2013-06-17 22:31:31 +02:00 |
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