mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-10 04:45:08 +01:00
0d58ff65e0
fixed video glitches in games that switch video horizontal width. fixed BIOS infinite loop on hard reset
298 lines
8.2 KiB
C
298 lines
8.2 KiB
C
/****************************************************************************
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* Genesis Plus
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* DATEL Action Replay / Pro Action Replay emulation
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*
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* Copyright (C) 2009 Eke-Eke (GCN/Wii port)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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***************************************************************************/
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#include "shared.h"
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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static struct
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{
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uint8 enabled;
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uint8 rom[0x20000];
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uint8 ram[0x10000];
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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static void wram_write_byte(uint32 address, uint32 data);
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static void wram_write_word(uint32 address, uint32 data);
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static void ar_write_regs(uint32 address, uint32 data);
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static void ar_write_regs_pro2(uint32 address, uint32 data);
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void datel_init(void)
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{
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int i;
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memset(&action_replay,0,sizeof(action_replay));
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/* load Action Replay ROM program */
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FILE *f = fopen(AR_ROM,"rb");
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if (!f) return;
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int size = fread(action_replay.rom,1,0x20000,f);
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fclose(f);
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/* detect Action Replay yype */
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if (size < 0x10000)
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action_replay.enabled = TYPE_AR;
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else if (size < 0x20000)
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action_replay.enabled = TYPE_PRO2;
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else
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action_replay.enabled = TYPE_PRO1;
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/* default memory map */
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switch (action_replay.enabled)
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{
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case TYPE_AR:
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{
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/* internal registers mapped at $0000-$ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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/* $0000-$7fff mirrored into $8000-$ffff */
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memcpy(action_replay.rom+0x8000,action_replay.rom,0x8000);
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break;
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}
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case TYPE_PRO1:
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{
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/* internal registers mapped at $0000-$ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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/* RAM (64k) mapped at $400000-$7fffff */
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for (i=0x40; i<0x80; i++)
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{
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m68k_memory_map[i].base = action_replay.ram;
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m68k_memory_map[i].read8 = NULL;
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m68k_memory_map[i].read16 = NULL;
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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}
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break;
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}
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case TYPE_PRO2:
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{
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/* internal registers mapped at $100000-$10ffff */
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m68k_memory_map[0x10].write16 = ar_write_regs_pro2;
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/* RAM (64k) mapped at $400000-$7fffff */
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for (i=0x40; i<0x80; i++)
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{
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m68k_memory_map[i].base = action_replay.ram;
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m68k_memory_map[i].read8 = NULL;
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m68k_memory_map[i].read16 = NULL;
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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}
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break;
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}
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}
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#ifdef LSB_FIRST
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/* Byteswap ROM */
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uint8 temp;
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for(i = 0; i < 0x20000; i += 2)
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{
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temp = action_replay.rom[i];
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action_replay.rom[i] = action_replay.rom[i+1];
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action_replay.rom[i+1] = temp;
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}
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#endif
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}
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void datel_reset(void)
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{
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if (action_replay.enabled)
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{
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/* reset codes */
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datel_switch(0);
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/* reset internal state */
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memset(action_replay.regs,0,sizeof(action_replay.regs));
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memset(action_replay.old,0,sizeof(action_replay.old));
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memset(action_replay.data,0,sizeof(action_replay.data));
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memset(action_replay.addr,0,sizeof(action_replay.addr));
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/* ROM mapped at $000000-$3fffff */
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int i;
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switch (action_replay.enabled)
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{
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case TYPE_AR: /* 32k ROM */
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case TYPE_PRO2: /* 64k ROM */
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{
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for (i=0x00; i<0x40; i++)
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{
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m68k_memory_map[i].base = action_replay.rom;
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}
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break;
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}
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case TYPE_PRO1: /* 128k ROM */
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{
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for (i=0x00; i<0x40; i+=2)
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{
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m68k_memory_map[i].base = action_replay.rom;
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m68k_memory_map[i+1].base = action_replay.rom + 0x10000;
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}
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break;
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}
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}
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}
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}
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void datel_switch(uint8 enable)
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{
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int i;
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if (enable)
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{
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int offset;
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/* store old values */
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for (i=0; i<4; i++)
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{
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if (action_replay.data[i])
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{
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offset = action_replay.addr[i] >> 16;
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if (offset < 0x40) /* cartridge ROM */
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action_replay.old[i] = *(uint16 *)(cart.rom + action_replay.addr[i]);
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else if (offset >= 0xe0) /* Work RAM */
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action_replay.old[i] = *(uint16 *)(work_ram + (action_replay.addr[i]&0xffff));
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}
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}
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/* patch new values */
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for (i=0; i<4; i++)
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{
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if (action_replay.data[i])
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{
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offset = action_replay.addr[i] >> 16;
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if (offset < 0x40) /* cartridge ROM */
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*(uint16 *)(cart.rom + action_replay.addr[i]) = action_replay.data[i];
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else if (offset >= 0xe0) /* Work RAM */
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*(uint16 *)(work_ram + (action_replay.addr[i]&0xffff)) = action_replay.data[i];
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}
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}
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/* set RAM write handlers */
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for (i=0xe0; i<0x100; i++)
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{
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m68k_memory_map[i].write8 = wram_write_byte;
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m68k_memory_map[i].write16 = wram_write_word;
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}
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}
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else
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{
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/* restore original data */
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for (i=0; i<4; i++)
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{
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if (action_replay.data[i])
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{
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if (action_replay.addr[i] < 0x400000)
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*(uint16 *)(cart.rom + action_replay.addr[i]) = action_replay.old[i];
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else if (action_replay.addr[i] >= 0xe00000)
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*(uint16 *)(work_ram + (action_replay.addr[i]&0xffff)) = action_replay.old[i];
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}
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}
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}
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}
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static void wram_write_byte(uint32 address, uint32 data)
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{
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int i;
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for (i=0; i<4; i++)
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{
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if ((address & 0xe0fffe) == (action_replay.addr[i]&0xe0fffe))
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{
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if (address & 1) /* lower byte write */
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action_replay.old[i] = (action_replay.old[i] & 0xff00) | (data & 0xff);
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else /* upper byte write */
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action_replay.old[i] = (action_replay.old[i] & 0x00ff) | (data << 8);
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return;
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}
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}
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WRITE_BYTE(work_ram, address & 0xffff, data);
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}
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static void wram_write_word(uint32 address, uint32 data)
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{
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int i;
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for (i=0; i<4; i++)
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{
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if ((address & 0xe0fffe) == (action_replay.addr[i]&0xe0fffe))
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{
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action_replay.old[i] = data;
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return;
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}
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}
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*(uint16 *)(work_ram + (address & 0xffff)) = data;
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}
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static void ar_write_regs(uint32 address, uint32 data)
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{
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if ((address > 0x10018) || (action_replay.regs[3] == 0xffff))
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{
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m68k_unused_16_w(address,data);
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return;
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}
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/* register offset */
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int offset = (address >> 1) & 0x0F;
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/* update internal register */
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action_replay.regs[offset] = data;
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/* decode patch value & address on exit */
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if ((offset == 3) && (data == 0xffff))
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{
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/* decode patch data */
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action_replay.data[0] = action_replay.regs[0];
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action_replay.data[1] = action_replay.regs[4];
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action_replay.data[2] = action_replay.regs[7];
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action_replay.data[3] = action_replay.regs[10];
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/* decode patch address */
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action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x7f00) << 8)) << 1;
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action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x7f00) << 8)) << 1;
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action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x7f00) << 8)) << 1;
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action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x7f00) << 8)) << 1;
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/* Cartridge ROM mapped to $000000-$3fffff */
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/* NOTE: codes should be disabled on startup */
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int i;
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for (i=0x00; i<0x40; i++)
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{
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m68k_memory_map[i].base = cart.rom + ((i<<16) & cart.mask);
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}
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}
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}
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static void ar_write_regs_pro2(uint32 address, uint32 data)
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{
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/* TODO */
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}
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