mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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28775cc3aa
---------- * added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) * added .ISO & .BIN CD image file support * added 512K backup cartridge RAM support * added savestate support for CD games NOTES: ~~~~~~ * to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin * CD audio tracks (CD-DA) are not supported (yet) [Core/CPU] ---------- * modified 68k core for Mega CD / Sega CD support [Core/VDP] --------------- * improved DMA accuracy * added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) [Gamecube/Wii] --------------- * modified Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). * replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) * State & SRAM files are now only compressed when saving to Gamecube Memory Cards * various fixes & cleanup. [Core/SCD] ---------- * added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) * added .ISO & .BIN CD image file support * added 512K backup cartridge RAM support * added savestate support for CD games NOTES: ~~~~~~ * to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin * CD audio tracks (CD-DA) are not supported (yet) [Core/CPU] ---------- * modified 68k core for Mega CD / Sega CD support [Core/VDP] --------------- * improved DMA accuracy * added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) [Gamecube/Wii] --------------- * modified Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). * replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) * State & SRAM files are now only compressed when saving to Gamecube Memory Cards * various fixes & cleanup.
261 lines
7.6 KiB
C
261 lines
7.6 KiB
C
/****************************************************************************
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* Genesis Plus
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* Microwire Serial EEPROM (93C46) support
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*
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* Copyright (C) 2011 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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#include "gg_eeprom.h"
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#define BIT_DATA (0)
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#define BIT_CLK (1)
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#define BIT_CS (2)
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T_EEPROM_93C gg_eeprom;
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void gg_eeprom_init()
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{
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/* default eeprom state */
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memset(&gg_eeprom, 0, sizeof(T_EEPROM_93C));
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gg_eeprom.data = 1;
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gg_eeprom.state = WAIT_START;
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}
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void gg_eeprom_ctrl(unsigned char data)
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{
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/* Reset EEPROM */
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if (data & 0x80)
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{
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gg_eeprom_init();
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return;
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}
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/* Enable EEPROM */
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gg_eeprom.enabled = data & 0x08;
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}
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void gg_eeprom_write(unsigned char data)
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{
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/* Make sure CS is HIGH */
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if (data & (1 << BIT_CS))
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{
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/* Data latched on CLK postive edge */
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if ((data & (1 << BIT_CLK)) && !gg_eeprom.clk)
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{
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/* Current EEPROM state */
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switch (gg_eeprom.state)
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{
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case WAIT_START:
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{
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/* Wait for START bit */
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if (data & (1 << BIT_DATA))
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{
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gg_eeprom.opcode = 0;
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gg_eeprom.cycles = 0;
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gg_eeprom.state = GET_OPCODE;
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}
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break;
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}
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case GET_OPCODE:
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{
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/* 8-bit buffer (opcode + address) */
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gg_eeprom.opcode |= ((data >> BIT_DATA) & 1) << (7 - gg_eeprom.cycles);
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gg_eeprom.cycles++;
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if (gg_eeprom.cycles == 8)
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{
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/* Decode instruction */
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switch ((gg_eeprom.opcode >> 6) & 3)
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{
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case 1:
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{
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/* WRITE */
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gg_eeprom.buffer = 0;
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gg_eeprom.cycles = 0;
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gg_eeprom.state = WRITE_WORD;
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break;
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}
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case 2:
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{
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/* READ */
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gg_eeprom.buffer = *(uint16 *)(sram.sram + ((gg_eeprom.opcode & 0x3F) << 1));
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gg_eeprom.cycles = 0;
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gg_eeprom.state = READ_WORD;
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/* Force DATA OUT */
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gg_eeprom.data = 0;
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break;
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}
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case 3:
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{
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/* ERASE */
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if (gg_eeprom.we)
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{
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*(uint16 *)(sram.sram + ((gg_eeprom.opcode & 0x3F) << 1)) = 0xFFFF;
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}
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/* wait for next command */
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gg_eeprom.state = WAIT_STANDBY;
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break;
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}
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default:
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{
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/* special command */
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switch ((gg_eeprom.opcode >> 4) & 3)
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{
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case 1:
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{
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/* WRITE ALL */
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gg_eeprom.buffer = 0;
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gg_eeprom.cycles = 0;
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gg_eeprom.state = WRITE_WORD;
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break;
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}
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case 2:
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{
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/* ERASE ALL */
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if (gg_eeprom.we)
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{
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memset(sram.sram, 0xFF, 128);
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}
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/* wait for next command */
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gg_eeprom.state = WAIT_STANDBY;
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break;
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}
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default:
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{
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/* WRITE ENABLE/DISABLE */
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gg_eeprom.we = (gg_eeprom.opcode >> 4) & 1;
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/* wait for next command */
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gg_eeprom.state = WAIT_STANDBY;
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break;
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}
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}
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break;
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}
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}
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}
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break;
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}
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case WRITE_WORD:
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{
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/* 16-bit data buffer */
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gg_eeprom.buffer |= ((data >> BIT_DATA) & 1) << (15 - gg_eeprom.cycles);
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gg_eeprom.cycles++;
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if (gg_eeprom.cycles == 16)
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{
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/* check EEPROM write protection */
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if (gg_eeprom.we)
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{
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if (gg_eeprom.opcode & 0x40)
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{
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/* write one word */
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*(uint16 *)(sram.sram + ((gg_eeprom.opcode & 0x3F) << 1)) = gg_eeprom.buffer;
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}
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else
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{
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/* write 64 words */
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int i;
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for (i=0; i<64; i++)
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{
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*(uint16 *)(sram.sram + (i << 1)) = gg_eeprom.buffer;
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}
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}
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}
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/* wait for next command */
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gg_eeprom.state = WAIT_STANDBY;
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}
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break;
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}
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case READ_WORD:
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{
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/* set DATA OUT */
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gg_eeprom.data = ((gg_eeprom.buffer >> (15 - gg_eeprom.cycles)) & 1);
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gg_eeprom.cycles++;
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if (gg_eeprom.cycles == 16)
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{
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/* read next word (93C46B) */
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gg_eeprom.opcode++;
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gg_eeprom.cycles = 0;
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gg_eeprom.buffer = *(uint16 *)(sram.sram + ((gg_eeprom.opcode & 0x3F) << 1));
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}
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break;
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}
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default:
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{
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/* wait for STANDBY mode */
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break;
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}
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}
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}
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}
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else
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{
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/* CS HIGH->LOW transition */
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if (gg_eeprom.cs)
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{
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/* standby mode */
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gg_eeprom.data = 1;
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gg_eeprom.state = WAIT_START;
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}
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}
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/* Update input lines */
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gg_eeprom.cs = (data >> BIT_CS) & 1;
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gg_eeprom.clk = (data >> BIT_CLK) & 1;
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}
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unsigned char gg_eeprom_read(void)
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{
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return ((gg_eeprom.cs << BIT_CS) | (gg_eeprom.data << BIT_DATA) | (1 << BIT_CLK));
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}
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