mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-09-19 12:49:43 +02:00
1032 lines
27 KiB
C
1032 lines
27 KiB
C
/***************************************************************************************
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* Genesis Plus 1.2a
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* 68k memory handlers
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* modified by Eke-Eke (compatibility fixes & additional code), GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "m68kcpu.h"
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#include "shared.h"
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uint8 m68k_readmap_8[32];
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uint8 m68k_readmap_16[32];
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uint8 m68k_writemap_8[32];
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uint8 m68k_writemap_16[32];
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uint8 pico_current;
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static uint8 pico_page[7] = {0x00,0x01,0x03,0x07,0x0F,0x1F,0x3F};
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static inline unsigned int m68k_read_bus_8(unsigned int address)
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{
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#ifdef LOGERROR
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if ((address != 0xa11100) && (address != 0xc00004) && (address != 0xc00006))
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{
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error("Unused read8 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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error("D0 = %x \n", m68k_get_reg (NULL, M68K_REG_D0));
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error("D1 = %x \n", m68k_get_reg (NULL, M68K_REG_D1));
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error("D2 = %x \n", m68k_get_reg (NULL, M68K_REG_D2));
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error("D3 = %x \n", m68k_get_reg (NULL, M68K_REG_D3));
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error("D4 = %x \n", m68k_get_reg (NULL, M68K_REG_D4));
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error("D5 = %x \n", m68k_get_reg (NULL, M68K_REG_D5));
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error("D6 = %x \n", m68k_get_reg (NULL, M68K_REG_D6));
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error("D7 = %x \n", m68k_get_reg (NULL, M68K_REG_D7));
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error("A0 = %x \n", m68k_get_reg (NULL, M68K_REG_A0));
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error("A1 = %x \n", m68k_get_reg (NULL, M68K_REG_A1));
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error("A2 = %x \n", m68k_get_reg (NULL, M68K_REG_A2));
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error("A3 = %x \n", m68k_get_reg (NULL, M68K_REG_A3));
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error("A4 = %x \n", m68k_get_reg (NULL, M68K_REG_A4));
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error("A5 = %x \n", m68k_get_reg (NULL, M68K_REG_A5));
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error("A6 = %x \n", m68k_get_reg (NULL, M68K_REG_A6));
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error("A7 = %x \n", m68k_get_reg (NULL, M68K_REG_A7));
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}
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#endif
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int bus_addr = (REG_PC & 0xffffe) | (address & 1);
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int offset = bus_addr >> 19;
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if (offset > 8) return READ_BYTE(work_ram, bus_addr & 0xffff);
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else return READ_BYTE(rom_readmap[offset], bus_addr & 0x7ffff);
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}
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static inline unsigned int m68k_read_bus_16(unsigned int address)
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{
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#ifdef LOGERROR
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if ((address != 0xa11100) && (address != 0xc00004) && (address != 0xc00006))
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{
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error("Unused read16 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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error("D0 = %x \n", m68k_get_reg (NULL, M68K_REG_D0));
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error("D1 = %x \n", m68k_get_reg (NULL, M68K_REG_D1));
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error("D2 = %x \n", m68k_get_reg (NULL, M68K_REG_D2));
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error("D3 = %x \n", m68k_get_reg (NULL, M68K_REG_D3));
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error("D4 = %x \n", m68k_get_reg (NULL, M68K_REG_D4));
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error("D5 = %x \n", m68k_get_reg (NULL, M68K_REG_D5));
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error("D6 = %x \n", m68k_get_reg (NULL, M68K_REG_D6));
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error("D7 = %x \n", m68k_get_reg (NULL, M68K_REG_D7));
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error("A0 = %x \n", m68k_get_reg (NULL, M68K_REG_A0));
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error("A1 = %x \n", m68k_get_reg (NULL, M68K_REG_A1));
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error("A2 = %x \n", m68k_get_reg (NULL, M68K_REG_A2));
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error("A3 = %x \n", m68k_get_reg (NULL, M68K_REG_A3));
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error("A4 = %x \n", m68k_get_reg (NULL, M68K_REG_A4));
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error("A5 = %x \n", m68k_get_reg (NULL, M68K_REG_A5));
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error("A6 = %x \n", m68k_get_reg (NULL, M68K_REG_A6));
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error("A7 = %x \n", m68k_get_reg (NULL, M68K_REG_A7));
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}
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#endif
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int bus_addr = REG_PC & 0xfffffe;
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int offset = bus_addr >> 19;
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if (offset > 8) return *(uint16 *)(work_ram + (bus_addr & 0xffff));
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else return *(uint16 *)(rom_readmap[offset] + (bus_addr & 0x7ffff));
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}
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static inline void m68k_unused_8_w (unsigned int address, unsigned int value)
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{
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#ifdef LOGERROR
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error("Unused write8 %08X = %02X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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}
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static inline void m68k_unused_16_w (unsigned int address, unsigned int value)
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{
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#ifdef LOGERROR
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error("Unused write16 %08X = %04X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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}
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/*
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Functions to handle memory accesses which cause the Genesis to halt
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either temporarily (press RESET button to restart) or unrecoverably
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(cycle power to restart).
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*/
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static inline void m68k_lockup_w_8 (unsigned int address, unsigned int value)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %02X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running) m68k_end_timeslice ();
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}
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static inline void m68k_lockup_w_16 (unsigned int address, unsigned int value)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %04X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running) m68k_end_timeslice ();
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}
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static inline unsigned int m68k_lockup_r_8 (unsigned int address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running) m68k_end_timeslice ();
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return -1;
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}
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static inline unsigned int m68k_lockup_r_16 (unsigned int address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running) m68k_end_timeslice ();
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return -1;
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}
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/*--------------------------------------------------------------------------*/
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/* 68000 memory handlers */
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/*--------------------------------------------------------------------------*/
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unsigned int m68k_read_memory_8(unsigned int address)
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{
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int offset = address >> 19;
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switch (m68k_readmap_8[offset])
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{
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case WRAM:
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return READ_BYTE(work_ram, address & 0xffff);
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case SYSTEM_IO:
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{
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unsigned int base = address >> 8;
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/* Z80 */
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if (base <= 0xa0ff)
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{
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/* Z80 controls Z bus ? */
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if (zbusack) return m68k_read_bus_8(address);
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/* Read data from Z bus */
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switch (base & 0x60)
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{
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case 0x40: /* YM2612 */
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return fm_read(0, address & 3);
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case 0x60: /* VDP */
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if (base == 0xa07f) return m68k_lockup_r_8(address);
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return (m68k_read_bus_8(address) | 0xff);
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default: /* ZRAM */
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return zram[address & 0x1fff];
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}
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}
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/* I/O & CONTROL registers */
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if (base <= 0xa1ff)
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{
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switch (base & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0) return m68k_read_bus_8(address);
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return (io_read((address >> 1) & 0x0f));
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case 0x11: /* BUSACK */
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return (zbusack | (address & 1) | (m68k_read_bus_8(address) & 0xFE));
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case 0x30: /* TIME */
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if (cart_hw.time_r) return cart_hw.time_r(address);
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else return m68k_read_bus_8(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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return m68k_read_bus_8(address);
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default: /* Invalid address */
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return m68k_lockup_r_8(address);
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}
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}
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/* Invalid address */
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return m68k_lockup_r_8(address);
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}
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case VDP:
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/* Valid VDP addresses */
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if (((address >> 16) & 0x07) == 0)
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{
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switch (address & 0xff)
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{
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case 0x00: /* DATA */
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case 0x02:
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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case 0x03:
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return (vdp_data_r() & 0xff);
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case 0x04: /* CTRL */
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case 0x06:
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return ((m68k_read_bus_8(address) & 0xfc) | ((vdp_ctrl_r() >> 8) & 3));
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case 0x05: /* CTRL */
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case 0x07:
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return (vdp_ctrl_r() & 0xff);
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case 0x08: /* HVC */
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case 0x0a:
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case 0x0c:
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case 0x0e:
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return (vdp_hvc_r() >> 8);
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case 0x09: /* HVC */
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case 0x0b:
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case 0x0d:
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case 0x0f:
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return (vdp_hvc_r() & 0xff);
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case 0x18:
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case 0x19:
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case 0x1a:
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case 0x1b:
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case 0x1c:
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case 0x1d:
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case 0x1e:
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case 0x1f: /* Unused */
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return m68k_read_bus_8(address);
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default: /* Invalid address */
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return m68k_lockup_r_8(address);
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}
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}
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/* Invalid address */
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return (m68k_lockup_r_8 (address));
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case SRAM:
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if (address <= sram.end) return READ_BYTE(sram.sram, address - sram.start);
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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case EEPROM:
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if (address == eeprom.type.sda_out_adr) return eeprom_read(address, 0);
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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case CART_HW:
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return cart_hw.regs_r(address);
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case UNUSED:
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return m68k_read_bus_8(address);
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case ILLEGAL:
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return m68k_lockup_r_8(address);
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case UMK3_HACK:
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return READ_BYTE(&cart_rom[offset<<19], address & 0x7ffff);
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case PICO_HW:
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switch (address & 0xff)
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{
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case 0x01: /* VERSION register */
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return (0x40);
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case 0x03: /* IO register */
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{
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uint8 retval = 0xff;
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if (input.pad[0] & INPUT_B) retval &= ~0x10;
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if (input.pad[0] & INPUT_A) retval &= ~0x80;
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if (input.pad[0] & INPUT_UP) retval &= ~0x01;
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if (input.pad[0] & INPUT_DOWN) retval &= ~0x02;
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if (input.pad[0] & INPUT_LEFT) retval &= ~0x04;
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if (input.pad[0] & INPUT_RIGHT) retval &= ~0x08;
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retval &= ~0x20;
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retval &= ~0x40;
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return retval;
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}
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case 0x05: /* MSB PEN X coordinate */
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return (input.analog[0][0] >> 8);
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case 0x07: /* LSB PEN X coordinate */
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return (input.analog[0][0] & 0xff);
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case 0x09: /* MSB PEN Y coordinate */
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return (input.analog[0][1] >> 8);
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case 0x0b: /* LSB PEN Y coordinate */
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return (input.analog[0][1] & 0xff);
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case 0x0d: /* PAGE register */
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return pico_page[pico_current]; /* TODO */
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case 0x10: /* PCM registers */
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case 0x11:
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case 0x12:
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case 0x13:
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return 0x80; /* TODO */
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default:
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return m68k_read_bus_8(address);
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}
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default: /* ROM */
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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}
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}
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unsigned int m68k_read_memory_16 (unsigned int address)
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{
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int offset = address >> 19;
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switch (m68k_readmap_16[offset])
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{
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case WRAM:
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return *(uint16 *)(work_ram + (address & 0xffff));
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case SVP_DRAM:
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return *(uint16 *)(svp->dram + (address & 0x1fffe));
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case SVP_CELL:
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switch (address >> 16)
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{
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case 0x39:
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address >>= 1;
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address = (address & 0x7001) | ((address & 0x3e) << 6) | ((address & 0xfc0) >> 5);
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return *(uint16 *)(svp->dram + (address & 0x1fffe));
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case 0x3A:
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address >>= 1;
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address = (address & 0x7801) | ((address & 0x1e) << 6) | ((address & 0x7e0) >> 4);
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return *(uint16 *)(svp->dram + (address & 0x1fffe));
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default:
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return m68k_read_bus_16(address);
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}
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case SYSTEM_IO:
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{
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unsigned int base = address >> 8;
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/* Z80 */
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if (base <= 0xa0ff)
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{
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/* Z80 controls Z bus ? */
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if (zbusack) return m68k_read_bus_16(address);
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/* Read data from Z bus */
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switch (base & 0x60)
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{
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case 0x40: /* YM2612 */
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{
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int temp = fm_read(0, address & 3);
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return (temp << 8 | temp);
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}
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case 0x60: /* VDP */
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if (base == 0xa07f) return m68k_lockup_r_16(address);
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return (m68k_read_bus_16(address) | 0xffff);
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default: /* ZRAM */
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{
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int temp = zram[address & 0x1fff];
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return (temp << 8 | temp);
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}
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}
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}
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/* CONTROL registers */
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if (base <= 0xa1ff)
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{
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switch (base & 0xff)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0) return m68k_read_bus_16(address);
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int temp = io_read((address >> 1) & 0x0f);
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return (temp << 8 | temp);
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}
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case 0x11: /* BUSACK */
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return ((m68k_read_bus_16(address) & 0xfeff) | (zbusack << 8));
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case 0x50: /* SVP */
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if (svp)
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{
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switch (address & 0xff)
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{
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case 0:
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case 2:
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return svp->ssp1601.gr[SSP_XST].h;
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case 4:
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{
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unsigned int temp = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return temp;
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}
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}
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}
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return m68k_read_bus_16(address);
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case 0x30: /* TIME */
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if (cart_hw.time_r) return cart_hw.time_r(address);
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else return m68k_read_bus_16(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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return m68k_read_bus_16(address);
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default: /* Invalid address */
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return m68k_lockup_r_16(address);
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}
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}
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/* Invalid address */
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return m68k_lockup_r_16 (address);
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}
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case VDP:
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/* Valid VDP addresses */
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if (((address >> 16) & 0x07) == 0)
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{
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switch (address & 0xfc)
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{
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case 0x00: /* DATA */
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return vdp_data_r();
|
|
|
|
case 0x04: /* CTRL */
|
|
return ((vdp_ctrl_r() & 0x3FF) | (m68k_read_bus_16(address) & 0xFC00));
|
|
|
|
case 0x08: /* HVC */
|
|
case 0x0c:
|
|
return vdp_hvc_r();
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x1c:
|
|
return m68k_read_bus_16(address);
|
|
|
|
default:
|
|
return m68k_lockup_r_16(address);
|
|
}
|
|
}
|
|
|
|
/* Invalid address */
|
|
return m68k_lockup_r_16 (address);
|
|
|
|
case SRAM:
|
|
if (address <= sram.end) return *(uint16 *)(sram.sram + (address - sram.start));
|
|
return *(uint16 *)(rom_readmap[offset] + (address & 0x7ffff));
|
|
|
|
case EEPROM:
|
|
if (address == (eeprom.type.sda_out_adr & 0xfffffe)) return eeprom_read(address, 1);
|
|
return *(uint16 *)(rom_readmap[offset] + (address & 0x7ffff));
|
|
|
|
case J_CART:
|
|
return jcart_read();
|
|
|
|
case REALTEC_ROM:
|
|
return *(uint16 *)(&cart_rom[0x7e000] + (address & 0x1fff));
|
|
|
|
case UNUSED:
|
|
return m68k_read_bus_16(address);
|
|
|
|
case ILLEGAL:
|
|
return m68k_lockup_r_16(address);
|
|
|
|
case UMK3_HACK:
|
|
return *(uint16 *)(&cart_rom[offset << 19] + (address & 0x7ffff));
|
|
|
|
case PICO_HW:
|
|
switch (address & 0xff)
|
|
{
|
|
case 0x00: /* VERSION register */
|
|
return (0x40);
|
|
|
|
case 0x02: /* IO register */
|
|
{
|
|
uint8 retval = 0xff;
|
|
if (input.pad[0] & INPUT_B) retval &= ~0x10;
|
|
if (input.pad[0] & INPUT_A) retval &= ~0x80;
|
|
if (input.pad[0] & INPUT_UP) retval &= ~0x01;
|
|
if (input.pad[0] & INPUT_DOWN) retval &= ~0x02;
|
|
if (input.pad[0] & INPUT_LEFT) retval &= ~0x04;
|
|
if (input.pad[0] & INPUT_RIGHT) retval &= ~0x08;
|
|
retval &= ~0x20;
|
|
retval &= ~0x40;
|
|
return retval;
|
|
}
|
|
|
|
case 0x04: /* MSB PEN X coordinate */
|
|
return (input.analog[0][0] >> 8);
|
|
|
|
case 0x06: /* LSB PEN X coordinate */
|
|
return (input.analog[0][0] & 0xff);
|
|
|
|
case 0x08: /* MSB PEN Y coordinate */
|
|
return (input.analog[0][1] >> 8);
|
|
|
|
case 0x0a: /* LSB PEN Y coordinate */
|
|
return (input.analog[0][1] & 0xff);
|
|
|
|
case 0x0c: /* PAGE register */
|
|
return pico_page[pico_current]; /* TODO */
|
|
|
|
case 0x10: /* PCM data register */
|
|
return 0x8000; /* TODO */
|
|
|
|
case 0x12: /* PCM control registe */
|
|
return 0x8000; /* TODO */
|
|
|
|
default:
|
|
return m68k_read_bus_16(address);
|
|
}
|
|
|
|
default: /* ROM */
|
|
return *(uint16 *)(rom_readmap[offset] + (address & 0x7ffff));
|
|
}
|
|
}
|
|
|
|
|
|
unsigned int m68k_read_memory_32(unsigned int address)
|
|
{
|
|
/* Split into 2 reads */
|
|
return ((m68k_read_memory_16 (address) << 16) |
|
|
(m68k_read_memory_16 ((address+ 2)&0xffffff)));
|
|
}
|
|
|
|
|
|
void m68k_write_memory_8(unsigned int address, unsigned int value)
|
|
{
|
|
int offset = address >> 19;
|
|
|
|
switch (m68k_writemap_8[offset])
|
|
{
|
|
case VDP:
|
|
/* Valid VDP addresses */
|
|
if (((address >> 16) & 0x07) == 0)
|
|
{
|
|
switch (address & 0xff)
|
|
{
|
|
case 0x00: /* Data port */
|
|
case 0x01:
|
|
case 0x02:
|
|
case 0x03:
|
|
vdp_data_w(value << 8 | value);
|
|
return;
|
|
|
|
case 0x04: /* Control port */
|
|
case 0x05:
|
|
case 0x06:
|
|
case 0x07:
|
|
vdp_ctrl_w(value << 8 | value);
|
|
return;
|
|
|
|
case 0x10: /* Unused */
|
|
case 0x12:
|
|
case 0x14:
|
|
case 0x16:
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case 0x11: /* PSG */
|
|
case 0x13:
|
|
case 0x15:
|
|
case 0x17:
|
|
psg_write(0, value);
|
|
return;
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x19:
|
|
case 0x1a:
|
|
case 0x1b:
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case 0x1c: /* Test register */
|
|
case 0x1d:
|
|
case 0x1e:
|
|
case 0x1f:
|
|
vdp_test_w(value << 8 | value);
|
|
return;
|
|
|
|
default: /* Invalid address */
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Invalid address */
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
|
|
|
|
case SYSTEM_IO:
|
|
{
|
|
unsigned int base = address >> 8;
|
|
|
|
/* Z80 */
|
|
if (base <= 0xa0ff)
|
|
{
|
|
/* Writes are ignored when the Z80 hogs the Z-bus */
|
|
if (zbusack)
|
|
{
|
|
m68k_unused_8_w (address, value);
|
|
return;
|
|
}
|
|
|
|
/* Read data from Z bus */
|
|
switch (base & 0x60)
|
|
{
|
|
case 0x40: /* YM2612 */
|
|
fm_write(0, address & 3, value);
|
|
return;
|
|
|
|
case 0x60:
|
|
switch (base & 0x7f)
|
|
{
|
|
case 0x60: /* Bank register */
|
|
gen_bank_w(value & 1);
|
|
return;
|
|
|
|
case 0x7f: /* VDP */
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
|
|
default:
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
}
|
|
|
|
default: /* ZRAM */
|
|
zram[address & 0x1fff] = value;
|
|
count_m68k ++;
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* CONTROL registers */
|
|
if (base <= 0xa1ff)
|
|
{
|
|
switch (base & 0xff)
|
|
{
|
|
case 0x00: /* I/O chip (only gets /LWR) */
|
|
if ((address & 0xe1) == 0x01) io_write((address >> 1) & 0x0f, value);
|
|
else m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case 0x11: /* BUSREQ */
|
|
if (address & 1) m68k_unused_8_w(address, value);
|
|
else gen_busreq_w(value & 1);
|
|
return;
|
|
|
|
case 0x12: /* RESET */
|
|
if (address & 1) m68k_unused_8_w(address, value);
|
|
else gen_reset_w(value & 1);
|
|
return;
|
|
|
|
case 0x30: /* TIME */
|
|
if (cart_hw.time_w) cart_hw.time_w(address, value);
|
|
else m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case 0x41: /* BOOTROM */
|
|
if (address & 1)
|
|
{
|
|
if (value & 1)
|
|
{
|
|
rom_readmap[0] = &cart_rom[0];
|
|
rom_size = genromsize;
|
|
}
|
|
else
|
|
{
|
|
rom_readmap[0] = &bios_rom[0];
|
|
rom_size = 0x800;
|
|
}
|
|
|
|
if (!(config.bios_enabled & 2))
|
|
{
|
|
config.bios_enabled |= 2;
|
|
memcpy(bios_rom, cart_rom, 0x800);
|
|
memset(cart_rom, 0, 0x500000);
|
|
}
|
|
}
|
|
else m68k_unused_8_w (address, value);
|
|
return;
|
|
|
|
case 0x10: /* MEMORY MODE */
|
|
case 0x20: /* MEGA-CD */
|
|
case 0x40: /* TMSS */
|
|
case 0x44: /* RADICA */
|
|
case 0x50: /* SVP REGISTERS */
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
default: /* Invalid address */
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Invalid address */
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
}
|
|
|
|
case ROM:
|
|
WRITE_BYTE(rom_readmap[offset], address & 0x7ffff, value);
|
|
return;
|
|
|
|
case SRAM:
|
|
if (address <= sram.end) WRITE_BYTE(sram.sram, address - sram.start, value);
|
|
else m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case EEPROM:
|
|
if ((address == eeprom.type.sda_in_adr) || (address == eeprom.type.scl_adr)) eeprom_write(address, value, 0);
|
|
else m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case CART_HW:
|
|
cart_hw.regs_w(address, value);
|
|
return;
|
|
|
|
case UNUSED:
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
|
|
case ILLEGAL:
|
|
m68k_lockup_w_8(address, value);
|
|
return;
|
|
|
|
case PICO_HW:
|
|
switch (address & 0xff)
|
|
{
|
|
case 0x19:
|
|
case 0x1b:
|
|
case 0x1d:
|
|
case 0x1f: /* TMSS register */
|
|
return;
|
|
|
|
default:
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
}
|
|
|
|
default: /* WRAM */
|
|
WRITE_BYTE(work_ram, address & 0xffff, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
void m68k_write_memory_16 (unsigned int address, unsigned int value)
|
|
{
|
|
int offset = address >> 19;
|
|
|
|
switch (m68k_writemap_16[offset])
|
|
{
|
|
case SVP_DRAM:
|
|
*(uint16 *)(svp->dram + (address & 0x1fffe)) = value;
|
|
if ((address == 0x30fe06) && value) svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06;
|
|
if ((address == 0x30fe08) && value) svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08;
|
|
return;
|
|
|
|
case VDP:
|
|
/* Valid VDP addresses */
|
|
if (((address >> 16) & 0x07) == 0)
|
|
{
|
|
switch (address & 0xfc)
|
|
{
|
|
case 0x00: /* DATA */
|
|
vdp_data_w(value);
|
|
return;
|
|
|
|
case 0x04: /* CTRL */
|
|
vdp_ctrl_w(value);
|
|
return;
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14:
|
|
psg_write(0, value & 0xff);
|
|
return;
|
|
|
|
case 0x18: /* Unused */
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
case 0x1c: /* Test register */
|
|
vdp_test_w(value);
|
|
return;
|
|
|
|
default: /* Invalid address */
|
|
m68k_lockup_w_16 (address, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Invalid address */
|
|
m68k_lockup_w_16 (address, value);
|
|
return;
|
|
|
|
|
|
case SYSTEM_IO:
|
|
{
|
|
unsigned int base = address >> 8;
|
|
|
|
/* Z80 */
|
|
if (base <= 0xa0ff)
|
|
{
|
|
/* Writes are ignored when the Z80 hogs the Z-bus */
|
|
if (zbusack)
|
|
{
|
|
m68k_unused_16_w (address, value);
|
|
return;
|
|
}
|
|
|
|
/* Write into Z80 address space */
|
|
switch (base & 0x60)
|
|
{
|
|
case 0x40: /* YM2612 */
|
|
fm_write (0, address & 3, value >> 8);
|
|
return;
|
|
|
|
case 0x60:
|
|
switch (base & 0x7f)
|
|
{
|
|
case 0x60: /* Bank register */
|
|
gen_bank_w ((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x7f: /* VDP */
|
|
m68k_lockup_w_16(address, value);
|
|
return;
|
|
|
|
default:
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
}
|
|
|
|
default: /* ZRAM */
|
|
zram[address & 0x1fff] = value >> 8;
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* CONTROL registers */
|
|
if (base <= 0xa1ff)
|
|
{
|
|
switch (base & 0xff)
|
|
{
|
|
case 0x00: /* I/O chip */
|
|
if (address & 0xe0) m68k_unused_16_w (address, value);
|
|
else io_write ((address >> 1) & 0x0f, value & 0xff);
|
|
return;
|
|
|
|
case 0x11: /* BUSREQ */
|
|
gen_busreq_w ((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x12: /* RESET */
|
|
gen_reset_w ((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x50: /* SVP REGISTERS */
|
|
if (svp && ((address & 0xfd) == 0))
|
|
{
|
|
/* just guessing here (Notaz) */
|
|
svp->ssp1601.gr[SSP_XST].h = value;
|
|
svp->ssp1601.gr[SSP_PM0].h |= 2;
|
|
svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
|
|
return;
|
|
}
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
case 0x30: /* TIME */
|
|
if (cart_hw.time_w)
|
|
{
|
|
cart_hw.time_w(address & 0xfe, value >> 8);
|
|
cart_hw.time_w(address, value & 0xff);
|
|
}
|
|
else m68k_unused_16_w (address, value);
|
|
return;
|
|
|
|
case 0x41: /* BOOTROM */
|
|
if (value & 1)
|
|
{
|
|
rom_readmap[0] = &cart_rom[0];
|
|
rom_size = genromsize;
|
|
}
|
|
else
|
|
{
|
|
rom_readmap[0] = &bios_rom[0];
|
|
rom_size = 0x800;
|
|
}
|
|
|
|
if (!(config.bios_enabled & 2))
|
|
{
|
|
config.bios_enabled |= 2;
|
|
memcpy(bios_rom, cart_rom, 0x800);
|
|
memset(cart_rom, 0, 0x500000);
|
|
}
|
|
return;
|
|
|
|
case 0x10: /* MEMORY MODE */
|
|
case 0x20: /* MEGA-CD */
|
|
case 0x40: /* TMSS */
|
|
case 0x44: /* RADICA */
|
|
m68k_unused_16_w (address, value);
|
|
return;
|
|
|
|
default: /* Unused */
|
|
m68k_lockup_w_16 (address, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Invalid address */
|
|
m68k_lockup_w_16 (address, value);
|
|
return;
|
|
}
|
|
|
|
case ROM:
|
|
*(uint16 *)(rom_readmap[offset] + (address & 0x7ffff)) = value;
|
|
return;
|
|
|
|
case SRAM:
|
|
if (address <= sram.end) *(uint16 *)(sram.sram + (address - sram.start)) = value;
|
|
else m68k_unused_16_w (address, value);
|
|
return;
|
|
|
|
case EEPROM:
|
|
if ((address == (eeprom.type.sda_in_adr&0xfffffe)) || (address == (eeprom.type.scl_adr&0xfffffe)))
|
|
eeprom_write(address, value, 1);
|
|
else m68k_unused_16_w (address, value);
|
|
return;
|
|
|
|
case J_CART:
|
|
jcart_write(value);
|
|
return;
|
|
|
|
case UNUSED:
|
|
m68k_unused_16_w (address, value);
|
|
return;
|
|
|
|
case ILLEGAL:
|
|
m68k_lockup_w_16 (address, value);
|
|
return;
|
|
|
|
case PICO_HW:
|
|
switch (address & 0xff)
|
|
{
|
|
case 0x10: /* PCM data register */
|
|
return; /* TODO */
|
|
|
|
case 0x12: /* PCM control resiter */
|
|
return; /* TODO */
|
|
|
|
case 0x18:
|
|
case 0x1a:
|
|
case 0x1c:
|
|
case 0x1e: /* TMSS register */
|
|
return;
|
|
|
|
default:
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
}
|
|
|
|
default: /* WRAM */
|
|
*(uint16 *)(work_ram + (address & 0xffff)) = value;
|
|
return;
|
|
}
|
|
}
|
|
|
|
void m68k_write_memory_32 (unsigned int address, unsigned int value)
|
|
{
|
|
/* Split into 2 writes */
|
|
m68k_write_memory_16 (address, value >> 16);
|
|
m68k_write_memory_16 ((address+2) & 0xffffff, value & 0xffff);
|
|
}
|