mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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183 lines
5.6 KiB
C
183 lines
5.6 KiB
C
/***************************************************************************************
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* Genesis Plus
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* XE-1AP analog controller support
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*
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* Copyright (C) 2011-2014 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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static struct
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{
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uint8 State;
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uint8 Counter;
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uint8 Latency;
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} xe_1ap[2];
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void xe_1ap_reset(int index)
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{
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input.analog[index][0] = 128;
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input.analog[index][1] = 128;
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input.analog[index+1][0] = 128;
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index >>= 2;
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xe_1ap[index].State = 0x40;
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xe_1ap[index].Counter = 0;
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xe_1ap[index].Latency = 0;
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}
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INLINE unsigned char xe_1ap_read(int index)
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{
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unsigned int temp = 0x40;
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unsigned int port = index << 2;
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/* Left Stick X & Y analog values (bidirectional) */
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int x = input.analog[port][0];
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int y = input.analog[port][1];
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/* Right Stick X or Y value (unidirectional) */
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int z = input.analog[port+1][0];
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/* Buttons status (active low) */
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uint16 pad = ~input.pad[port];
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/* Current internal cycle (0-7) */
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unsigned int cycle = xe_1ap[index].Counter & 7;
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/* Current 4-bit data cycle */
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/* There are eight internal data cycle for each 5 acquisition sequence */
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/* First 4 return the same 4-bit data, next 4 return next 4-bit data */
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switch (xe_1ap[index].Counter >> 2)
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{
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case 0:
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temp |= ((pad >> 8) & 0x0F); /* E1 E2 Start Select */
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break;
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case 1:
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temp |= ((pad >> 4) & 0x0F); /* A B C D */
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break;
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case 2:
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temp |= ((x >> 4) & 0x0F);
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break;
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case 3:
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temp |= ((y >> 4) & 0x0F);
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break;
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case 4:
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break;
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case 5:
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temp |= ((z >> 4) & 0x0F);
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break;
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case 6:
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temp |= (x & 0x0F);
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break;
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case 7:
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temp |= (y & 0x0F);
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break;
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case 8:
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break;
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case 9:
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temp |= (z & 0x0F);
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break;
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}
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/* TL indicates which part of data is returned (0=1st part, 1=2nd part) */
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temp |= ((cycle & 4) << 2);
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/* TR indicates if data is ready (0=ready, 1=not ready) */
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/* Fastest One input routine actually expects this bit to switch between 0 & 1 */
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/* so we make the first read of a data cycle return 1 then 0 for remaining reads */
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temp |= (!(cycle & 3) << 5);
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/* Automatically increment data cycle on each read (within current acquisition sequence) */
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cycle = (cycle + 1) & 7;
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/* Update internal cycle counter */
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xe_1ap[index].Counter = (xe_1ap[index].Counter & ~7) | cycle;
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/* Update internal latency on each read */
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xe_1ap[index].Latency++;
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return temp;
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}
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INLINE void xe_1ap_write(int index, unsigned char data, unsigned char mask)
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{
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/* update bits set as output only */
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data = (xe_1ap[index].State & ~mask) | (data & mask);
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/* look for TH 1->0 transitions */
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if (!(data & 0x40) && (xe_1ap[index].State & 0x40))
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{
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/* reset acquisition cycle */
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xe_1ap[index].Latency = xe_1ap[index].Counter = 0;
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}
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else
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{
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/* some games immediately write new data to TH */
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/* so we make sure first sequence has actually been handled */
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if (xe_1ap[index].Latency > 2)
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{
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/* next acquisition sequence */
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xe_1ap[index].Counter = (xe_1ap[index].Counter & ~7) + 8;
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/* 5 sequence max with 8 cycles each */
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if (xe_1ap[index].Counter > 32)
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{
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xe_1ap[index].Counter = 32;
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}
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}
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}
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/* update internal state */
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xe_1ap[index].State = data;
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}
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unsigned char xe_1ap_1_read(void)
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{
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return xe_1ap_read(0);
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}
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unsigned char xe_1ap_2_read(void)
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{
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return xe_1ap_read(1);
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}
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void xe_1ap_1_write(unsigned char data, unsigned char mask)
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{
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xe_1ap_write(0, data, mask);
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}
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void xe_1ap_2_write(unsigned char data, unsigned char mask)
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{
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xe_1ap_write(1, data, mask);
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}
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