mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-12 13:55:07 +01:00
267 lines
8.5 KiB
C
267 lines
8.5 KiB
C
/***************************************************************************************
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* Genesis Plus 1.2a
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* Genesis internals & Bus controller
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* modified by Eke-Eke (compatibility fixes & additional code), GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "shared.h"
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uint8 *cart_rom; /* CART rom */
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uint8 bios_rom[0x10000]; /* BIOS rom */
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uint8 work_ram[0x10000]; /* 68K work RAM */
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uint8 zram[0x2000]; /* Z80 work RAM */
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uint8 zbusreq; /* /BUSREQ from Z80 */
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uint8 zreset; /* /RESET to Z80 */
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uint8 zbusack; /* /BUSACK to Z80 */
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uint8 zirq; /* /IRQ to Z80 */
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uint32 zbank; /* Address of Z80 bank window */
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uint8 gen_running;
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uint32 genromsize;
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int32 resetline;
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/*--------------------------------------------------------------------------*/
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/* Init, reset, shutdown functions */
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/*--------------------------------------------------------------------------*/
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void set_softreset(void)
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{
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resetline = (int) ((double) (lines_per_frame - 1) * rand() / (RAND_MAX + 1.0));
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}
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void gen_init (void)
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{
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int i;
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/* initialize CPUs */
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m68k_set_cpu_type (M68K_CPU_TYPE_68000);
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m68k_init();
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z80_init(0,0,0,z80_irq_callback);
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/* initialize 68k default address space */
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for (i=0x0; i<0x100; i++)
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{
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m68k_memory_map[i].base = work_ram;
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m68k_memory_map[i].read8 = NULL;
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m68k_memory_map[i].read16 = NULL;
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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zbank_memory_map[i].read = NULL;
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zbank_memory_map[i].write = NULL;
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}
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/* initialize 68k memory map */
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for (i=0x80; i<0xe0; i++)
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{
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/* illegal area */
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m68k_memory_map[i].read8 = m68k_lockup_r_8;
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m68k_memory_map[i].read16 = m68k_lockup_r_16;
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m68k_memory_map[i].write8 = m68k_lockup_w_8;
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m68k_memory_map[i].write16 = m68k_lockup_w_16;
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zbank_memory_map[i].read = zbank_lockup_r;
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zbank_memory_map[i].write = zbank_lockup_w;
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}
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/* Z80 bus */
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m68k_memory_map[0xa0].read8 = z80_read_byte;
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m68k_memory_map[0xa0].read16 = z80_read_word;
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m68k_memory_map[0xa0].write8 = z80_write_byte;
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m68k_memory_map[0xa0].write16 = z80_write_word;
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zbank_memory_map[0xa0].read = zbank_lockup_r;
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zbank_memory_map[0xa0].write = zbank_lockup_w;
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/* I/O & Control registers */
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m68k_memory_map[0xa1].read8 = ctrl_io_read_byte;
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m68k_memory_map[0xa1].read16 = ctrl_io_read_word;
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m68k_memory_map[0xa1].write8 = ctrl_io_write_byte;
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m68k_memory_map[0xa1].write16 = ctrl_io_write_word;
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zbank_memory_map[0xa1].read = zbank_read_ctrl_io;
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zbank_memory_map[0xa1].write = zbank_write_ctrl_io;
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/* SEGA PICO */
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if (system_hw == SYSTEM_PICO)
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{
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m68k_memory_map[0x80].read8 = pico_read_byte;
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m68k_memory_map[0x80].read16 = pico_read_word;
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m68k_memory_map[0x80].write8 = m68k_unused_8_w;
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m68k_memory_map[0x80].write16 = m68k_unused_16_w;
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/* there is no I/O area (Notaz) */
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m68k_memory_map[0xa0].read8 = m68k_read_bus_8;
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m68k_memory_map[0xa0].read16 = m68k_read_bus_16;
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m68k_memory_map[0xa0].write8 = m68k_unused_8_w;
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m68k_memory_map[0xa0].write16 = m68k_unused_16_w;
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m68k_memory_map[0xa1].read8 = m68k_read_bus_8;
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m68k_memory_map[0xa1].read16 = m68k_read_bus_16;
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m68k_memory_map[0xa1].write8 = m68k_unused_8_w;
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m68k_memory_map[0xa1].write16 = m68k_unused_16_w;
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}
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/* VDP */
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m68k_memory_map[0xc0].read8 = vdp_read_byte;
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m68k_memory_map[0xc0].read16 = vdp_read_word;
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m68k_memory_map[0xc0].write8 = vdp_write_byte;
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m68k_memory_map[0xc0].write16 = vdp_write_word;
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m68k_memory_map[0xc8].read8 = vdp_read_byte;
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m68k_memory_map[0xc8].read16 = vdp_read_word;
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m68k_memory_map[0xc8].write8 = vdp_write_byte;
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m68k_memory_map[0xc8].write16 = vdp_write_word;
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m68k_memory_map[0xd0].read8 = vdp_read_byte;
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m68k_memory_map[0xd0].read16 = vdp_read_word;
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m68k_memory_map[0xd0].write8 = vdp_write_byte;
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m68k_memory_map[0xd0].write16 = vdp_write_word;
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m68k_memory_map[0xd8].read8 = vdp_read_byte;
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m68k_memory_map[0xd8].read16 = vdp_read_word;
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m68k_memory_map[0xd8].write8 = vdp_write_byte;
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m68k_memory_map[0xd8].write16 = vdp_write_word;
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zbank_memory_map[0xc0].read = zbank_read_vdp;
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zbank_memory_map[0xc0].write = zbank_write_vdp;
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zbank_memory_map[0xc8].read = zbank_read_vdp;
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zbank_memory_map[0xc8].write = zbank_write_vdp;
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zbank_memory_map[0xd0].read = zbank_read_vdp;
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zbank_memory_map[0xd0].write = zbank_write_vdp;
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zbank_memory_map[0xd8].read = zbank_read_vdp;
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zbank_memory_map[0xd8].write = zbank_write_vdp;
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}
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void gen_reset (uint32 hard_reset)
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{
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if (hard_reset)
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{
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/* Clear RAM */
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memset (work_ram, 0x00, sizeof (work_ram));
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memset (zram, 0x00, sizeof (zram));
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/* TMSS BIOS */
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if (config.bios_enabled == 3)
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{
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m68k_memory_map[0].base = bios_rom;
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}
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}
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gen_running = 1;
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resetline = -1;
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zreset = 0; /* Z80 is reset */
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zbusreq = 0; /* Z80 has control of the Z bus */
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zbusack = 1; /* Z80 is busy using the Z bus */
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zirq = 0; /* No interrupts occuring */
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zbank = 0; /* Assume default bank is 000000-007FFF */
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/* Reset CPUs */
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m68k_pulse_reset ();
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z80_reset ();
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YM2612ResetChip();
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#ifdef NGC
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/* register SOFTRESET */
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SYS_SetResetCallback(set_softreset);
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#endif
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}
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void gen_shutdown (void)
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{
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}
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/*-----------------------------------------------------------------------
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Bus controller chip functions
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-----------------------------------------------------------------------*/
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void gen_busreq_w (uint32 state)
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{
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uint32 z80_cycles_to_run;
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if (state)
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{
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/* Bus Request */
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if (!zbusreq && zreset)
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{
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/* Z80 stopped */
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/* z80 was ON during the last 68k cycles */
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/* we execute the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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current_z80 = z80_cycles_to_run - count_z80;
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if (current_z80 > 0) count_z80 += z80_execute(current_z80);
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}
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}
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else
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{
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/* Bus released */
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if (zbusreq && zreset)
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{
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/* Z80 started */
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/* z80 was OFF during the last 68k cycles */
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/* we burn the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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count_z80 = z80_cycles_to_run;
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}
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}
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zbusreq = state;
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zbusack = 1 ^ (zbusreq & zreset);
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}
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void gen_reset_w (uint32 state)
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{
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uint32 z80_cycles_to_run;
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if (state)
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{
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/* stop RESET process */
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if (!zbusreq && !zreset)
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{
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/* Z80 started */
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/* z80 was OFF during the last 68k cycles */
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/* we burn the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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count_z80 = z80_cycles_to_run;
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}
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}
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else
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{
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/* start RESET process */
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if (!zbusreq && zreset)
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{
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/* Z80 stopped */
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/* z80 was ON during the last 68k cycles */
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/* we execute the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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current_z80 = z80_cycles_to_run - count_z80;
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if (current_z80 > 0) count_z80 += z80_execute(current_z80);
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}
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/* Reset Z80 & YM2612 */
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z80_reset ();
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YM2612ResetChip();
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}
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zreset = state;
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zbusack = 1 ^ (zbusreq & zreset);
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}
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void gen_bank_w (uint32 state)
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{
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zbank = ((zbank >> 1) | ((state & 1) << 23)) & 0xFF8000;
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}
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int z80_irq_callback (int param)
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{
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zirq = 0;
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z80_set_irq_line (0, CLEAR_LINE);
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return 0xFF;
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}
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