575 lines
18 KiB
C
575 lines
18 KiB
C
/***************************************************************************************
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* Genesis Plus
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* Internal Hardware & Bus controllers
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*
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* Support for SG-1000, Mark-III, Master System, Game Gear, Mega Drive & Mega CD hardware
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*
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* Copyright (C) 1998-2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2022 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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#ifdef USE_DYNAMIC_ALLOC
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external_t *ext;
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#else /* External Hardware (Cartridge, CD unit, ...) */
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external_t ext;
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#endif
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uint8 boot_rom[0x800]; /* Genesis BOOT ROM */
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uint8 work_ram[0x10000]; /* 68K RAM */
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uint8 zram[0x2000]; /* Z80 RAM */
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uint32 zbank; /* Z80 bank window address */
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uint8 zstate; /* Z80 bus state (d0 = BUSACK, d1 = /RESET) */
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uint8 pico_current; /* PICO current page */
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static uint8 tmss[4]; /* TMSS security register */
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/*--------------------------------------------------------------------------*/
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/* Init, reset, shutdown functions */
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/*--------------------------------------------------------------------------*/
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void gen_init(void)
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{
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int i;
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/* initialize Z80 */
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z80_init(0,z80_irq_callback);
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/* 8-bit / 16-bit modes */
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if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
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{
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/* initialize main 68k */
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m68k_init();
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m68k.aerr_enabled = config.addr_error;
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/* initialize main 68k memory map */
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/* $800000-$DFFFFF : illegal access by default */
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for (i=0x80; i<0xe0; i++)
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{
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m68k.memory_map[i].base = work_ram; /* for VDP DMA */
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m68k.memory_map[i].read8 = m68k_lockup_r_8;
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m68k.memory_map[i].read16 = m68k_lockup_r_16;
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m68k.memory_map[i].write8 = m68k_lockup_w_8;
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m68k.memory_map[i].write16 = m68k_lockup_w_16;
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zbank_memory_map[i].read = zbank_lockup_r;
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zbank_memory_map[i].write = zbank_lockup_w;
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}
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/* $C0xxxx, $C8xxxx, $D0xxxx, $D8xxxx : VDP ports */
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for (i=0xc0; i<0xe0; i+=8)
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{
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m68k.memory_map[i].read8 = vdp_read_byte;
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m68k.memory_map[i].read16 = vdp_read_word;
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m68k.memory_map[i].write8 = vdp_write_byte;
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m68k.memory_map[i].write16 = vdp_write_word;
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zbank_memory_map[i].read = zbank_read_vdp;
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zbank_memory_map[i].write = zbank_write_vdp;
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}
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/* $E00000-$FFFFFF : Work RAM (64k) */
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for (i=0xe0; i<0x100; i++)
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{
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m68k.memory_map[i].base = work_ram;
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m68k.memory_map[i].read8 = NULL;
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m68k.memory_map[i].read16 = NULL;
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m68k.memory_map[i].write8 = NULL;
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m68k.memory_map[i].write16 = NULL;
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/* Z80 can ONLY write to 68k RAM, not read it */
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zbank_memory_map[i].read = zbank_unused_r;
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zbank_memory_map[i].write = NULL;
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}
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if (system_hw == SYSTEM_PICO)
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{
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/* additional registers mapped to $800000-$80FFFF */
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m68k.memory_map[0x80].read8 = pico_read_byte;
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m68k.memory_map[0x80].read16 = pico_read_word;
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m68k.memory_map[0x80].write8 = m68k_unused_8_w;
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m68k.memory_map[0x80].write16 = m68k_unused_16_w;
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/* there is no I/O area (Notaz) */
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m68k.memory_map[0xa1].read8 = m68k_read_bus_8;
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m68k.memory_map[0xa1].read16 = m68k_read_bus_16;
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m68k.memory_map[0xa1].write8 = m68k_unused_8_w;
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m68k.memory_map[0xa1].write16 = m68k_unused_16_w;
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/* initialize page index (closed) */
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pico_current = 0;
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}
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else
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{
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/* $A10000-$A1FFFF : I/O & Control registers */
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m68k.memory_map[0xa1].read8 = ctrl_io_read_byte;
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m68k.memory_map[0xa1].read16 = ctrl_io_read_word;
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m68k.memory_map[0xa1].write8 = ctrl_io_write_byte;
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m68k.memory_map[0xa1].write16 = ctrl_io_write_word;
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zbank_memory_map[0xa1].read = zbank_read_ctrl_io;
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zbank_memory_map[0xa1].write = zbank_write_ctrl_io;
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/* initialize Z80 memory map */
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/* $0000-$3FFF is mapped to Z80 RAM (8K mirrored) */
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/* $4000-$FFFF is mapped to hardware but Z80 PC should never point there */
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for (i=0; i<64; i++)
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{
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z80_readmap[i] = &zram[(i & 7) << 10];
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}
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/* initialize Z80 memory handlers */
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z80_writemem = z80_memory_w;
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z80_readmem = z80_memory_r;
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/* initialize Z80 port handlers */
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z80_writeport = z80_unused_port_w;
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z80_readport = z80_unused_port_r;
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}
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/* $000000-$7FFFFF : external hardware area */
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if (system_hw == SYSTEM_MCD)
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{
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/* initialize SUB-CPU */
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s68k_init();
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s68k.aerr_enabled = config.addr_error;
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/* initialize CD hardware */
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scd_init();
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}
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else
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{
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/* Cartridge hardware */
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md_cart_init();
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}
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}
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else
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{
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/* initialize cartridge hardware & Z80 memory handlers */
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sms_cart_init();
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/* initialize Z80 ports handlers */
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switch (system_hw)
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{
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/* Master System compatibility mode */
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case SYSTEM_PBC:
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{
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z80_writeport = z80_md_port_w;
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z80_readport = z80_md_port_r;
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break;
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}
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/* Game Gear hardware */
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case SYSTEM_GG:
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case SYSTEM_GGMS:
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{
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/* initialize cartridge hardware & Z80 memory handlers */
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sms_cart_init();
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/* initialize Z80 ports handlers */
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z80_writeport = z80_gg_port_w;
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z80_readport = z80_gg_port_r;
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break;
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}
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/* Master System hardware */
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case SYSTEM_SMS:
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case SYSTEM_SMS2:
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{
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z80_writeport = z80_ms_port_w;
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z80_readport = z80_ms_port_r;
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break;
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}
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/* Mark-III hardware */
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case SYSTEM_MARKIII:
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{
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z80_writeport = z80_m3_port_w;
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z80_readport = z80_m3_port_r;
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break;
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}
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/* SG-1000 hardware */
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case SYSTEM_SG:
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case SYSTEM_SGII:
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case SYSTEM_SGII_RAM_EXT:
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{
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z80_writeport = z80_sg_port_w;
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z80_readport = z80_sg_port_r;
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break;
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}
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}
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}
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}
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void gen_reset(int hard_reset)
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{
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/* System Reset */
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if (hard_reset)
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{
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/* On hard reset, 68k CPU always starts at the same point in VDP frame */
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/* Tests performed on VA4 PAL MD1 showed that the first HVC value read */
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/* with 'move.w #0x8104,0xC00004' , 'move.w 0xC00008,%d0' sequence was */
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/* 0x9F21 in 60HZ mode (0x9F00 if Mode 5 is not enabled by first MOVE) */
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/* 0x8421 in 50HZ mode (0x8400 if Mode 5 is not enabled by first MOVE) */
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/* Same value is returned on every power ON, indicating VDP is always */
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/* starting at the same fixed point in frame (probably at the start of */
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/* VSYNC and HSYNC) while 68k /VRES line remains asserted a fixed time */
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/* after /SRES line has been released (13 msec approx). The difference */
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/* between PAL & NTSC is caused by the top border area being 27 lines */
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/* larger in PAL mode than in NTSC mode. CPU cycle counter is adjusted */
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/* to match these results (taking in account emulated frame is started */
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/* on line 192 */
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m68k.cycles = ((lines_per_frame - 192 + 159 - (27 * vdp_pal)) * MCYCLES_PER_LINE) + 1004;
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/* clear RAM (on real hardware, RAM values are random / undetermined on Power ON) */
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memset(work_ram, 0x00, sizeof (work_ram));
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memset(zram, 0x00, sizeof (zram));
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}
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else
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{
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/* when RESET button is pressed, 68k could be anywhere in VDP frame (Bonkers, Eternal Champions, X-Men 2) */
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m68k.cycles = (uint32)((MCYCLES_PER_LINE * lines_per_frame) * ((double)rand() / (double)RAND_MAX));
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/* reset YM2612 (on hard reset, this is done by sound_reset) */
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fm_reset(0);
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}
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/* 68k M-cycles should be a multiple of 7 */
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m68k.cycles = (m68k.cycles / 7) * 7;
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/* Z80 M-cycles should be a multiple of 15 */
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Z80.cycles = (m68k.cycles / 15) * 15;
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/* 8-bit / 16-bit modes */
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if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
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{
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if (system_hw == SYSTEM_MCD)
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{
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/* FRES is only asserted on Power ON */
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if (hard_reset)
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{
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/* reset CD hardware */
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scd_reset(1);
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}
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/* reset MD cartridge hardware (only when booting from cartridge) */
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if (scd.cartridge.boot)
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{
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md_cart_reset(hard_reset);
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}
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}
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else
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{
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/* reset MD cartridge hardware */
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md_cart_reset(hard_reset);
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}
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/* Z80 bus is released & Z80 is reseted */
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m68k.memory_map[0xa0].read8 = m68k_read_bus_8;
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m68k.memory_map[0xa0].read16 = m68k_read_bus_16;
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m68k.memory_map[0xa0].write8 = m68k_unused_8_w;
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m68k.memory_map[0xa0].write16 = m68k_unused_16_w;
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zstate = 0;
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/* assume default bank is $000000-$007FFF */
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zbank = 0;
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/* TMSS support */
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if ((config.bios & 1) && (system_hw == SYSTEM_MD) && hard_reset)
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{
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int i;
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/* clear TMSS register */
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memset(tmss, 0x00, sizeof(tmss));
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/* VDP access is locked by default */
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for (i=0xc0; i<0xe0; i+=8)
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{
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m68k.memory_map[i].read8 = m68k_lockup_r_8;
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m68k.memory_map[i].read16 = m68k_lockup_r_16;
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m68k.memory_map[i].write8 = m68k_lockup_w_8;
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m68k.memory_map[i].write16 = m68k_lockup_w_16;
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zbank_memory_map[i].read = zbank_lockup_r;
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zbank_memory_map[i].write = zbank_lockup_w;
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}
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/* check if BOOT ROM is loaded */
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if (system_bios & SYSTEM_MD)
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{
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/* save default cartridge slot mapping */
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cart.base = m68k.memory_map[0].base;
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/* BOOT ROM is mapped at $000000-$0007FF */
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m68k.memory_map[0].base = boot_rom;
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}
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}
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/* reset MAIN-CPU */
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m68k_pulse_reset();
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}
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else
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{
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/* RAM state at power-on is undefined on some systems */
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if ((system_hw == SYSTEM_MARKIII) || ((system_hw & SYSTEM_SMS) && (region_code == REGION_JAPAN_NTSC)))
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{
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/* some korean games rely on RAM to be initialized with values different from $00 or $ff */
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memset(work_ram, 0xf0, sizeof(work_ram));
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}
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/* reset cartridge hardware */
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sms_cart_reset();
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/* halt 68k (/VRES is forced low) */
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m68k_pulse_halt();
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}
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/* reset Z80 */
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z80_reset();
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/* some Z80 registers need to be initialized on Power ON */
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if (hard_reset)
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{
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/* Power Base Converter specific */
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if (system_hw == SYSTEM_PBC)
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{
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/* startup code logic (verified on real hardware): */
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/* 21 01 E1 : LD HL, $E101
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25 -- -- : DEC H
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F9 -- -- : LD SP,HL
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C7 -- -- : RST $00
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01 01 -- : LD BC, $xx01
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*/
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Z80.hl.w.l = 0xE001;
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Z80.sp.w.l = 0xDFFF;
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Z80.r = 4;
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}
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/* Master System & Game Gear specific */
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else if (system_hw & (SYSTEM_SMS | SYSTEM_GG))
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{
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/* check if BIOS is not being used */
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if ((!(config.bios & 1) || !(system_bios & (SYSTEM_SMS | SYSTEM_GG))))
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{
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/* a few Master System (Ace of Aces, Shadow Dancer) & Game Gear (Ecco the Dolphin, Evander Holyfield Real Deal Boxing) games crash if SP is not properly initialized */
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Z80.sp.w.l = 0xDFF0;
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}
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}
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}
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}
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/*-----------------------------------------------------------------------*/
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/* OS ROM / TMSS register control functions (Genesis mode) */
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/*-----------------------------------------------------------------------*/
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void gen_tmss_w(unsigned int offset, unsigned int data)
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{
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int i;
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/* write TMSS register */
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WRITE_WORD(tmss, offset, data);
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/* VDP requires "SEGA" value to be written in TMSS register */
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if (memcmp((char *)tmss, "SEGA", 4) == 0)
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{
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for (i=0xc0; i<0xe0; i+=8)
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{
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m68k.memory_map[i].read8 = vdp_read_byte;
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m68k.memory_map[i].read16 = vdp_read_word;
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m68k.memory_map[i].write8 = vdp_write_byte;
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m68k.memory_map[i].write16 = vdp_write_word;
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zbank_memory_map[i].read = zbank_read_vdp;
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zbank_memory_map[i].write = zbank_write_vdp;
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}
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}
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else
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{
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for (i=0xc0; i<0xe0; i+=8)
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{
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m68k.memory_map[i].read8 = m68k_lockup_r_8;
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m68k.memory_map[i].read16 = m68k_lockup_r_16;
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m68k.memory_map[i].write8 = m68k_lockup_w_8;
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m68k.memory_map[i].write16 = m68k_lockup_w_16;
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zbank_memory_map[i].read = zbank_lockup_r;
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zbank_memory_map[i].write = zbank_lockup_w;
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}
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}
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}
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void gen_bankswitch_w(unsigned int data)
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{
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/* check if BOOT ROM is loaded */
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if (system_bios & SYSTEM_MD)
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{
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if (data & 1)
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{
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/* enable cartridge ROM */
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m68k.memory_map[0].base = cart.base;
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}
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else
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{
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/* enable internal BOOT ROM */
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m68k.memory_map[0].base = boot_rom;
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}
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}
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}
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unsigned int gen_bankswitch_r(void)
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{
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/* check if BOOT ROM is loaded */
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if (system_bios & SYSTEM_MD)
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{
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return (m68k.memory_map[0].base == cart.base);
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}
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return 0xff;
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}
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/*-----------------------------------------------------------------------*/
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/* Z80 Bus controller chip functions (Genesis mode) */
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/* ----------------------------------------------------------------------*/
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void gen_zbusreq_w(unsigned int data, unsigned int cycles)
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{
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if (data) /* !ZBUSREQ asserted */
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{
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/* check if Z80 is going to be stopped */
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if (zstate == 1)
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{
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/* resynchronize with 68k */
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z80_run(cycles);
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/* enable 68k access to Z80 bus */
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m68k.memory_map[0xa0].read8 = z80_read_byte;
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m68k.memory_map[0xa0].read16 = z80_read_word;
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m68k.memory_map[0xa0].write8 = z80_write_byte;
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m68k.memory_map[0xa0].write16 = z80_write_word;
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}
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/* update Z80 bus status */
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zstate |= 2;
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}
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else /* !ZBUSREQ released */
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{
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/* check if Z80 is going to be restarted */
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|
if (zstate == 3)
|
|
{
|
|
/* resynchronize with 68k (Z80 cycles should remain a multiple of 15 MClocks) */
|
|
Z80.cycles = ((cycles + 14) / 15) * 15;
|
|
|
|
/* disable 68k access to Z80 bus */
|
|
m68k.memory_map[0xa0].read8 = m68k_read_bus_8;
|
|
m68k.memory_map[0xa0].read16 = m68k_read_bus_16;
|
|
m68k.memory_map[0xa0].write8 = m68k_unused_8_w;
|
|
m68k.memory_map[0xa0].write16 = m68k_unused_16_w;
|
|
}
|
|
|
|
/* update Z80 bus status */
|
|
zstate &= 1;
|
|
}
|
|
}
|
|
|
|
void gen_zreset_w(unsigned int data, unsigned int cycles)
|
|
{
|
|
if (data) /* !ZRESET released */
|
|
{
|
|
/* check if Z80 is going to be restarted */
|
|
if (zstate == 0)
|
|
{
|
|
/* resynchronize with 68k (Z80 cycles should remain a multiple of 15 MClocks) */
|
|
Z80.cycles = ((cycles + 14) / 15) * 15;
|
|
|
|
/* reset Z80 & YM2612 */
|
|
z80_reset();
|
|
fm_reset(cycles);
|
|
}
|
|
|
|
/* check if 68k access to Z80 bus is granted */
|
|
else if (zstate == 2)
|
|
{
|
|
/* enable 68k access to Z80 bus */
|
|
m68k.memory_map[0xa0].read8 = z80_read_byte;
|
|
m68k.memory_map[0xa0].read16 = z80_read_word;
|
|
m68k.memory_map[0xa0].write8 = z80_write_byte;
|
|
m68k.memory_map[0xa0].write16 = z80_write_word;
|
|
|
|
/* reset Z80 & YM2612 */
|
|
z80_reset();
|
|
fm_reset(cycles);
|
|
}
|
|
|
|
/* update Z80 bus status */
|
|
zstate |= 1;
|
|
}
|
|
else /* !ZRESET asserted */
|
|
{
|
|
/* check if Z80 is going to be stopped */
|
|
if (zstate == 1)
|
|
{
|
|
/* resynchronize with 68k */
|
|
z80_run(cycles);
|
|
}
|
|
|
|
/* check if 68k had access to Z80 bus */
|
|
else if (zstate == 3)
|
|
{
|
|
/* disable 68k access to Z80 bus */
|
|
m68k.memory_map[0xa0].read8 = m68k_read_bus_8;
|
|
m68k.memory_map[0xa0].read16 = m68k_read_bus_16;
|
|
m68k.memory_map[0xa0].write8 = m68k_unused_8_w;
|
|
m68k.memory_map[0xa0].write16 = m68k_unused_16_w;
|
|
}
|
|
|
|
/* stop YM2612 */
|
|
fm_reset(cycles);
|
|
|
|
/* update Z80 bus status */
|
|
zstate &= 2;
|
|
}
|
|
}
|
|
|
|
void gen_zbank_w (unsigned int data)
|
|
{
|
|
zbank = ((zbank >> 1) | ((data & 1) << 23)) & 0xFF8000;
|
|
}
|
|
|
|
|
|
/*-----------------------------------------------------------------------*/
|
|
/* Z80 interrupt callback */
|
|
/* ----------------------------------------------------------------------*/
|
|
|
|
int z80_irq_callback (int param)
|
|
{
|
|
return -1;
|
|
}
|