mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-05 02:15:07 +01:00
ab4638144c
--------------- * added support for Master System compatibility mode (Z80 ports access mode), incl. Mode 5 rendering. * added Mode 4 rendering for both Genesis & Master System modes. * added alternate BG planes rendering functions (should be faster on PPC architectures). [Core/IO] --------------- * added support for Master System compatibility mode (Z80 ports access mode). * added Master System peripherals emulation (Control Pad, Paddle, Sports Pad & Light Phaser). * added XE-1AP (analog controller) emulation. * added Activator emulation. [Core/Extra] --------------- * added support for all known Master System cartridge mappers. * added copy-protection hardware emulation for a few MD unlicensed games: fixes 777 Casino (crash when talking to bunny girls). (NB: most of those unlicensed games seem to have been already patched by ROM dumpers, main purpose is documenting them) * added support for Top Shooter arcade board controller. (A=Shoot, B=Bet, C/RIGHT=Coins, START=Start, hold UP on startup to enter service mode) * improved King of Fighters 98 mapper emulation (registers address decoding is now 100% accurate) * fixed Game Genie when several codes affect same ROM address. * fixed EEPROM types for Brian Lara Cricket & NBA Jam TE (verified on real cartridges) [Core/General] --------------- * added Master System compatibility mode emulation (automatically enabled when loading ROM file with .sms extension). * improved savestate stability & compatibility (support for old 1.4.x savestates is preserved) * various code cleanup & comments. [Gamecube/Wii] --------------- * fixed cheat codes handling when several codes affect same ROM address. * improved input controller detection on menu exit. * improved key remapping dialog box to match emulated device * changed Menu key for Gamecube controller to allow MODE button mapping * fixed DVD not being unmounted on swap (memory leak) [Wii only] --------------- * added USB mouse support for Sega Mouse emulation * compiled with latest libogc: improves USB compatibility & fixes stability issues with Wiimotes.
451 lines
10 KiB
C
451 lines
10 KiB
C
/***************************************************************************************
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* Genesis Plus
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* I/O controller (MD & MS compatibility modes)
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Eke-Eke (2007-2011), additional code & fixes for the GCN/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "shared.h"
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#include "gamepad.h"
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#include "lightgun.h"
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#include "mouse.h"
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#include "activator.h"
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#include "xe_a1p.h"
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#include "teamplayer.h"
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#include "paddle.h"
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#include "sportspad.h"
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uint8 io_reg[0x10];
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uint8 region_code = REGION_USA;
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static struct port_t
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{
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void (*data_w)(unsigned char data, unsigned char mask);
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unsigned char (*data_r)(void);
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} port[3];
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static void dummy_write(unsigned char data, unsigned char mask)
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{
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}
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static unsigned char dummy_read(void)
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{
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return 0x7F;
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}
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/*****************************************************************************
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* I/O chip functions *
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* *
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*****************************************************************************/
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void io_init(void)
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{
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/* Initialize connected peripherals */
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input_init();
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/* Initialize IO Ports handlers & connected peripherals */
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switch (input.system[0])
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{
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case SYSTEM_MS_GAMEPAD:
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{
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port[0].data_w = dummy_write;
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port[0].data_r = gamepad_1_read;
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break;
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}
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case SYSTEM_MD_GAMEPAD:
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{
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port[0].data_w = gamepad_1_write;
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port[0].data_r = gamepad_1_read;
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break;
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}
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case SYSTEM_MOUSE:
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{
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port[0].data_w = mouse_write;
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port[0].data_r = mouse_read;
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break;
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}
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case SYSTEM_ACTIVATOR:
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{
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port[0].data_w = activator_1_write;
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port[0].data_r = activator_1_read;
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break;
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}
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case SYSTEM_XE_A1P:
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{
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port[0].data_w = xe_a1p_write;
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port[0].data_r = xe_a1p_read;
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break;
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}
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case SYSTEM_WAYPLAY:
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{
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port[0].data_w = wayplay_1_write;
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port[0].data_r = wayplay_1_read;
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break;
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}
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case SYSTEM_TEAMPLAYER:
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{
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port[0].data_w = teamplayer_1_write;
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port[0].data_r = teamplayer_1_read;
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break;
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}
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case SYSTEM_LIGHTPHASER:
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{
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port[0].data_w = dummy_write;
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port[0].data_r = phaser_1_read;
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break;
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}
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case SYSTEM_PADDLE:
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{
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port[0].data_w = paddle_1_write;
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port[0].data_r = paddle_1_read;
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break;
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}
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case SYSTEM_SPORTSPAD:
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{
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port[0].data_w = sportspad_1_write;
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port[0].data_r = sportspad_1_read;
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break;
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}
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default:
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{
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port[0].data_w = dummy_write;
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port[0].data_r = dummy_read;
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break;
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}
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}
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switch (input.system[1])
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{
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case SYSTEM_MS_GAMEPAD:
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{
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port[1].data_w = dummy_write;
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port[1].data_r = gamepad_2_read;
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break;
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}
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case SYSTEM_MD_GAMEPAD:
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{
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port[1].data_w = gamepad_2_write;
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port[1].data_r = gamepad_2_read;
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break;
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}
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case SYSTEM_MOUSE:
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{
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port[1].data_w = mouse_write;
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port[1].data_r = mouse_read;
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break;
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}
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case SYSTEM_ACTIVATOR:
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{
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port[1].data_w = activator_2_write;
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port[1].data_r = activator_2_read;
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break;
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}
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case SYSTEM_MENACER:
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{
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port[1].data_w = dummy_write;
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port[1].data_r = menacer_read;
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break;
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}
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case SYSTEM_JUSTIFIER:
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{
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port[1].data_w = justifier_write;
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port[1].data_r = justifier_read;
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break;
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}
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case SYSTEM_WAYPLAY:
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{
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port[1].data_w = wayplay_2_write;
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port[1].data_r = wayplay_2_read;
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break;
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}
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case SYSTEM_TEAMPLAYER:
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{
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port[1].data_w = teamplayer_2_write;
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port[1].data_r = teamplayer_2_read;
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break;
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}
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case SYSTEM_LIGHTPHASER:
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{
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port[1].data_w = dummy_write;
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port[1].data_r = phaser_2_read;
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break;
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}
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case SYSTEM_PADDLE:
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{
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port[1].data_w = paddle_2_write;
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port[1].data_r = paddle_2_read;
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break;
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}
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case SYSTEM_SPORTSPAD:
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{
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port[1].data_w = sportspad_2_write;
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port[1].data_r = sportspad_2_read;
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break;
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}
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default:
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{
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port[1].data_w = dummy_write;
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port[1].data_r = dummy_read;
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break;
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}
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}
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/* External Port (unconnected) */
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port[2].data_w = dummy_write;
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port[2].data_r = dummy_read;
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}
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void io_reset(void)
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{
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/* Reset I/O registers */
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if (system_hw == SYSTEM_PBC)
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{
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/* SMS compatibility mode control register */
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io_reg[0x00] = 0xFF;
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}
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else
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{
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/* Genesis mode registers */
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io_reg[0x00] = region_code | 0x20 | (config.tmss & 1);
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io_reg[0x01] = 0x00;
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io_reg[0x02] = 0x00;
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io_reg[0x03] = 0x00;
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io_reg[0x04] = 0x00;
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io_reg[0x05] = 0x00;
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io_reg[0x06] = 0x00;
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io_reg[0x07] = 0xFF;
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io_reg[0x08] = 0x00;
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io_reg[0x09] = 0x00;
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io_reg[0x0A] = 0xFF;
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io_reg[0x0B] = 0x00;
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io_reg[0x0C] = 0x00;
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io_reg[0x0D] = 0xFB;
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io_reg[0x0E] = 0x00;
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io_reg[0x0F] = 0x00;
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}
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/* Reset connected peripherals */
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input_reset();
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}
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void io_68k_write(unsigned int offset, unsigned int data)
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{
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switch (offset)
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{
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case 0x01: /* Port A Data */
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case 0x02: /* Port B Data */
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case 0x03: /* Port C Data */
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{
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io_reg[offset] = data;
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port[offset-1].data_w(data, io_reg[offset + 3]);
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return;
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}
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case 0x04: /* Port A Ctrl */
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case 0x05: /* Port B Ctrl */
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case 0x06: /* Port C Ctrl */
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{
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if (data != io_reg[offset])
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{
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io_reg[offset] = data;
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port[offset-4].data_w(io_reg[offset-3], data);
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}
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return;
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}
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case 0x07: /* Port A TxData */
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case 0x0A: /* Port B TxData */
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case 0x0D: /* Port C TxData */
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{
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io_reg[offset] = data;
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return;
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}
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case 0x09: /* Port A S-Ctrl */
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case 0x0C: /* Port B S-Ctrl */
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case 0x0F: /* Port C S-Ctrl */
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{
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io_reg[offset] = data & 0xF8;
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return;
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}
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default: /* Read-only ports */
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{
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return;
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}
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}
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}
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unsigned int io_68k_read(unsigned int offset)
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{
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switch(offset)
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{
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case 0x01: /* Port A Data */
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case 0x02: /* Port B Data */
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case 0x03: /* Port C Data */
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{
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unsigned int mask = 0x80 | io_reg[offset + 3];
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unsigned int data = port[offset-1].data_r();
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return (io_reg[offset] & mask) | (data & ~mask);
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}
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default: /* return register value */
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{
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return io_reg[offset];
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}
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}
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}
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void io_z80_write(unsigned int data)
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{
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/* pins can't be configured as output on japanese models */
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if (region_code & REGION_USA)
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{
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/*
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Bit Function
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--------------
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D7 : Port B TH pin output level (1=high, 0=low)
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D6 : Port B TR pin output level (1=high, 0=low)
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D5 : Port A TH pin output level (1=high, 0=low)
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D4 : Port A TR pin output level (1=high, 0=low)
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D3 : Port B TH pin direction (1=input, 0=output)
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D2 : Port B TR pin direction (1=input, 0=output)
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D1 : Port A TH pin direction (1=input, 0=output)
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D0 : Port A TR pin direction (1=input, 0=output)
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*/
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/* Send TR/TH state to connected peripherals */
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port[0].data_w((data << 1) & 0x60, (~io_reg[0] << 5) & 0x60);
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port[1].data_w((data >> 1) & 0x60, (~io_reg[0] << 3) & 0x60);
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/* Check for TH low-to-high transitions on both ports */
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if ((!(io_reg[0] & 0x80) && (data & 0x80)) ||
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(!(io_reg[0] & 0x20) && (data & 0x20)))
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{
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/* Latch new HVC */
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hvc_latch = hctab[(mcycles_z80 + Z80_CYCLE_OFFSET) % MCYCLES_PER_LINE] | 0x10000;
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}
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}
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else
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{
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/* outputs return fixed value */
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data &= 0x0F;
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}
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/* Update control register */
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io_reg[0] = data;
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}
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unsigned int io_z80_read(unsigned int offset)
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{
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/* Read port A & port B input data */
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unsigned int data = (port[0].data_r()) | (port[1].data_r() << 8);
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/* Read control register value */
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unsigned int ctrl = io_reg[0];
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/* I/O ports */
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if (offset)
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{
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/*
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Bit Function
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--------------
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D7 : Port B TH pin input
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D6 : Port A TH pin input
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D5 : Unused (0 on Mega Drive, 1 otherwise)
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D4 : RESET button (always 1 on Mega Drive)
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D3 : Port B TR pin input
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D2 : Port B TL pin input
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D1 : Port B Right pin input
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D0 : Port B Left pin input
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*/
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data = ((data >> 10) & 0x0F) | (data & 0x40) | ((data >> 7) & 0x80) | 0x10;
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/* Adjust port B TH state if configured as output */
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if (!(ctrl & 0x08))
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{
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data &= ~0x80;
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data |= (ctrl & 0x80);
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}
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/* Adjust port A TH state if configured as output */
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if (!(ctrl & 0x02))
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{
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data &= ~0x40;
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data |= ((ctrl & 0x20) << 1);
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}
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/* Adjust port B TR state if configured as output */
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if (!(ctrl & 0x04))
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{
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data &= ~0x08;
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data |= ((ctrl & 0x40) >> 3);
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}
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}
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else
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{
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/*
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Bit Function
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--------------
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D7 : Port B Down pin input
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D6 : Port B Up pin input
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D5 : Port A TR pin input
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D4 : Port A TL pin input
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D3 : Port A Right pin input
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D2 : Port A Left pin input
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D1 : Port A Down pin input
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D0 : Port A Up pin input
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*/
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data = (data & 0x3F) | ((data >> 2) & 0xC0);
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/* Adjust port A TR state if configured as output */
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if (!(ctrl & 0x01))
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{
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data &= ~0x20;
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data |= ((ctrl & 0x10) << 1);
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}
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}
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return data;
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}
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