mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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357 lines
9.5 KiB
C
357 lines
9.5 KiB
C
/***************************************************************************************
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* Genesis Plus
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* PCM sound chip (315-5476A) (RF5C164 compatible)
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*
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* Copyright (C) 2012 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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#include "blip.h"
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#define PCM_CLOCKS_PER_SAMPLE (384 * 4)
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#define pcm scd.pcm_hw
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static struct blip_buffer_t* blip[2];
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void pcm_init(double clock, double samplerate)
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{
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pcm_shutdown();
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/* allocate blip buffers */
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blip[0] = blip_alloc(clock, samplerate * PCM_CLOCKS_PER_SAMPLE, samplerate / 4);
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blip[1] = blip_alloc(clock, samplerate * PCM_CLOCKS_PER_SAMPLE, samplerate / 4);
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}
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void pcm_shutdown(void)
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{
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/* desallocate blip buffers */
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if (blip[0]) blip_free(blip[0]);
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if (blip[1]) blip_free(blip[1]);
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blip[0] = blip[1] = 0;
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}
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void pcm_reset(void)
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{
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/* reset chip & clear external RAM */
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memset(&pcm, 0, sizeof(pcm_t));
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/* reset default bank */
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pcm.bank = pcm.ram;
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/* clear blip delta buffers */
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blip_clear(blip[0]);
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blip_clear(blip[1]);
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}
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void pcm_update(short *buffer, int length)
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{
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/* get number of clocks needed */
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length = blip_clocks_needed(blip[0], length);
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/* check if PCM chip is running */
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if (pcm.enabled)
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{
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int i, j, l, r;
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/* generate PCM samples */
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for (i=0; i<length; i++)
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{
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/* clear output */
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l = r = 0;
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/* run eight PCM channels */
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for (j=0; j<8; j++)
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{
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/* check if channel is enabled */
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if (pcm.status & (1 << j))
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{
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/* read current WAVE RAM address */
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short data = pcm.ram[(pcm.chan[j].addr >> 11) & 0xffff];
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/* STOP data ? */
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if (data == 0xff)
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{
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/* reset WAVE RAM address with loop address */
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pcm.chan[j].addr = pcm.chan[j].ls.w << 11;
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/* read WAVE RAM address again */
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data = pcm.ram[pcm.chan[j].ls.w];
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}
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/* infinite loop should not output any data */
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if (data != 0xff)
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{
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/* output L & R subchannels */
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if (data & 0x80)
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{
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/* PCM data is negative */
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data = -(data & 0x7f);
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}
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/* multiply PCM data with ENV & stereo PAN data then add to outputs (13.6 fixed point) */
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l += ((data * pcm.chan[j].env * (pcm.chan[j].pan & 0x0F)) >> 6);
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r += ((data * pcm.chan[j].env * (pcm.chan[j].pan >> 4)) >> 6);
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/* increment WAVE RAM address */
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pcm.chan[j].addr += pcm.chan[j].fd.w;
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}
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}
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}
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/* limiter */
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if (l < -32768) l = -32768;
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else if (l > 32767) l = 32767;
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if (r < -32768) r = -32768;
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else if (r > 32767) r = 32767;
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/* check if PCM left output changed */
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if (pcm.out[0] != l)
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{
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blip_add(blip[0], i, l-pcm.out[0]);
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pcm.out[0] = l;
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}
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/* check if PCM right output changed */
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if (pcm.out[1] != r)
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{
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blip_add(blip[1], i, r-pcm.out[1]);
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pcm.out[1] = r;
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}
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}
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}
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else
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{
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/* check if PCM left output changed */
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if (pcm.out[0])
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{
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blip_add(blip[0], 0, -pcm.out[0]);
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pcm.out[0] = 0;
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}
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/* check if PCM right output changed */
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if (pcm.out[1])
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{
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blip_add(blip[1], 0, -pcm.out[1]);
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pcm.out[1] = 0;
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}
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}
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/* resample to output stereo buffer */
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blip_end_frame(blip[0], length);
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blip_read_samples(blip[0], buffer, 1);
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blip_end_frame(blip[1], length);
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blip_read_samples(blip[1], buffer + 1, 1);
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}
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void pcm_write(unsigned int address, unsigned char data)
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{
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#ifdef LOG_PCM
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error("[%d][%d]PCM %x write -> 0x%02x (%X)\n", v_counter, s68k.cycles, address, data, s68k.pc);
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#endif
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/* external RAM is mapped to $1000-$1FFF */
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if (address >= 0x1000)
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{
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/* 4K bank access */
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pcm.bank[address & 0xfff] = data;
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return;
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}
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/* internal area si mapped to $0000-$0FFF */
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switch (address)
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{
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case 0x00: /* ENV register */
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{
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/* update channel ENV multiplier */
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pcm.chan[pcm.index].env = data;
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return;
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}
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case 0x01: /* PAN register */
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{
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/* update channel stereo panning value */
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pcm.chan[pcm.index].pan = data;
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return;
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}
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case 0x02: /* FD register (LSB) */
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{
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/* update channel WAVE RAM address increment LSB */
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pcm.chan[pcm.index].fd.byte.l = data;
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return;
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}
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case 0x03: /* FD register (MSB) */
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{
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/* update channel WAVE RAM address increment MSB */
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pcm.chan[pcm.index].fd.byte.h = data;
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return;
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}
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case 0x04: /* LS register (LSB) */
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{
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/* update channel WAVE RAM loop address LSB */
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pcm.chan[pcm.index].ls.byte.l = data;
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return;
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}
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case 0x05: /* LS register (MSB) */
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{
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/* update channel WAVE RAM loop address MSB */
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pcm.chan[pcm.index].ls.byte.h = data;
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return;
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}
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case 0x06: /* ST register */
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{
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/* update channel WAVE RAM start address (16.11 fixed point) */
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pcm.chan[pcm.index].st = data << (8 + 11);
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/* reload WAVE RAM address if channel is OFF */
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if (!(pcm.status & (1 << pcm.index)))
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{
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pcm.chan[pcm.index].addr = pcm.chan[pcm.index].st;
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}
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return;
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}
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case 0x07: /* CTRL register */
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{
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if (data & 0x40)
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{
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/* channel selection (0-7) */
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pcm.index = data & 0x07;
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}
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else
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{
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/* external RAM bank selection (16 x 4K) */
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pcm.bank = &pcm.ram[(data & 0x0f) << 12];
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}
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/* update PCM chip status (bit 7) */
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pcm.enabled = data & 0x80;
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return;
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}
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case 0x08: /* ON/OFF register */
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{
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/* update PCM channels status */
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pcm.status = ~data;
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/* reload WAVE RAM address pointers when channels are OFF */
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if (data & 0x01) pcm.chan[0].addr = pcm.chan[0].st;
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if (data & 0x02) pcm.chan[1].addr = pcm.chan[1].st;
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if (data & 0x04) pcm.chan[2].addr = pcm.chan[2].st;
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if (data & 0x08) pcm.chan[3].addr = pcm.chan[3].st;
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if (data & 0x10) pcm.chan[4].addr = pcm.chan[4].st;
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if (data & 0x20) pcm.chan[5].addr = pcm.chan[5].st;
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if (data & 0x40) pcm.chan[6].addr = pcm.chan[6].st;
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if (data & 0x80) pcm.chan[7].addr = pcm.chan[7].st;
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return;
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}
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default:
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{
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/* illegal access */
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return;
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}
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}
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}
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unsigned char pcm_read(unsigned int address)
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{
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#ifdef LOG_PCM
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error("[%d][%d]PCM %x read (%X)\n", v_counter, s68k.cycles, address, s68k.pc);
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#endif
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/* external RAM (TODO: verify if possible to read, some docs claim it's not !) */
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if (address >= 0x1000)
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{
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/* 4K bank access */
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return pcm.bank[address & 0xfff];
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}
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/* read WAVE RAM address pointers */
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if ((address >= 0x10) && (address < 0x20))
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{
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int index = (address >> 1) & 0x07;
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if (address & 1)
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{
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return (pcm.chan[index].addr >> (11 + 8)) & 0xff;
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}
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else
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{
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return (pcm.chan[index].addr >> 11) & 0xff;
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}
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}
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/* illegal access */
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return 0xff;
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}
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void pcm_ram_dma_w(unsigned int words)
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{
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uint16 data;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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/* PCM-RAM destination address*/
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uint16 dst_index = (scd.regs[0x0a>>1].w << 2) & 0xffe;
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/* update DMA destination address */
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scd.regs[0x0a>>1].w += (words >> 1);
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/* update DMA source address */
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cdc.dac.w += (words << 1);
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/* DMA transfer */
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while (words--)
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{
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/* read 16-bit word from CDC buffer */
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data = *(uint16 *)(cdc.ram + src_index);
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/* write 16-bit word to PCM RAM (endianness does not matter since PCM RAM is always accessed as byte)*/
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*(uint16 *)(pcm.bank + dst_index) = data ;
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/* increment CDC buffer source address */
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src_index = (src_index + 2) & 0x3ffe;
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/* increment PCM-RAM destination address */
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dst_index = (dst_index + 2) & 0xffe;
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}
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}
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