mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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28775cc3aa
---------- * added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) * added .ISO & .BIN CD image file support * added 512K backup cartridge RAM support * added savestate support for CD games NOTES: ~~~~~~ * to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin * CD audio tracks (CD-DA) are not supported (yet) [Core/CPU] ---------- * modified 68k core for Mega CD / Sega CD support [Core/VDP] --------------- * improved DMA accuracy * added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) [Gamecube/Wii] --------------- * modified Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). * replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) * State & SRAM files are now only compressed when saving to Gamecube Memory Cards * various fixes & cleanup. [Core/SCD] ---------- * added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) * added .ISO & .BIN CD image file support * added 512K backup cartridge RAM support * added savestate support for CD games NOTES: ~~~~~~ * to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin * CD audio tracks (CD-DA) are not supported (yet) [Core/CPU] ---------- * modified 68k core for Mega CD / Sega CD support [Core/VDP] --------------- * improved DMA accuracy * added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) [Gamecube/Wii] --------------- * modified Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). * replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) * State & SRAM files are now only compressed when saving to Gamecube Memory Cards * various fixes & cleanup.
320 lines
9.6 KiB
C
320 lines
9.6 KiB
C
/****************************************************************************
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* Genesis Plus
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* Action Replay / Pro Action Replay emulation
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*
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* Copyright (C) 2009-2011 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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static struct
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{
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uint8 enabled;
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uint8 status;
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uint8 *rom;
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uint8 *ram;
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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static void ar_write_regs(uint32 address, uint32 data);
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static void ar_write_regs_2(uint32 address, uint32 data);
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static void ar_write_ram_8(uint32 address, uint32 data);
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void areplay_init(void)
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{
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int size;
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FILE *f;
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memset(&action_replay,0,sizeof(action_replay));
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/* store Action replay ROM (max. 128k) & RAM (64k) above cartridge ROM + SRAM area */
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if (cart.romsize > 0x600000) return;
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action_replay.rom = cart.rom + 0x600000;
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action_replay.ram = cart.rom + 0x620000;
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/* Open Action Replay ROM */
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f = fopen(AR_ROM,"rb");
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if (f == NULL) return;
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/* ROM size */
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fseek(f, 0, SEEK_END);
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size = ftell(f);
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fseek(f, 0, SEEK_SET);
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/* detect Action Replay board type */
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switch (size)
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{
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case 0x8000:
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{
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/* normal Action Replay (32K) */
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action_replay.enabled = TYPE_AR;
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/* internal registers mapped at $010000-$01ffff */
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m68k.memory_map[0x01].write16 = ar_write_regs;
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break;
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}
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case 0x10000:
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case 0x20000:
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{
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/* read Stack Pointer */
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uint8 sp[4];
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fread(&sp, 4, 1, f);
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fseek(f, 0, SEEK_SET);
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/* Detect board version */
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if (sp[1] == 0x42)
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{
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/* PRO Action Replay 1 (64/128K) */
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action_replay.enabled = TYPE_PRO1;
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/* internal registers mapped at $010000-$01ffff */
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m68k.memory_map[0x01].write16 = ar_write_regs;
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}
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else if (sp[1] == 0x60)
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{
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/* PRO Action Replay 2 (64K) */
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action_replay.enabled = TYPE_PRO2;
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/* internal registers mapped at $100000-$10ffff */
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m68k.memory_map[0x10].write16 = ar_write_regs_2;
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}
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/* internal RAM (64k), mapped at $420000-$42ffff or $600000-$60ffff */
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if (action_replay.enabled)
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{
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m68k.memory_map[sp[1]].base = action_replay.ram;
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m68k.memory_map[sp[1]].read8 = NULL;
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m68k.memory_map[sp[1]].read16 = NULL;
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m68k.memory_map[sp[1]].write8 = ar_write_ram_8;
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m68k.memory_map[sp[1]].write16 = NULL;
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}
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break;
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}
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default:
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{
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break;
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}
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}
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if (action_replay.enabled)
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{
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/* Load ROM */
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int i = 0;
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for (i=0; i<size; i+=0x1000)
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{
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fread(action_replay.rom + i, 0x1000, 1, f);
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}
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#ifdef LSB_FIRST
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for (i= 0; i<size; i+=2)
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{
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/* Byteswap ROM */
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uint8 temp = action_replay.rom[i];
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action_replay.rom[i] = action_replay.rom[i+1];
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action_replay.rom[i+1] = temp;
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}
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#endif
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}
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/* Close ROM file */
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fclose(f);
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}
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void areplay_shutdown(void)
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{
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/* clear existing patches */
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areplay_set_status(AR_SWITCH_OFF);
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/* disable device by default */
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action_replay.enabled = 0;
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}
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void areplay_reset(int hard)
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{
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if (action_replay.enabled)
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{
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if (hard || (action_replay.status == AR_SWITCH_TRAINER))
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{
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/* reset internal registers */
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memset(action_replay.regs, 0, sizeof(action_replay.regs));
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memset(action_replay.old, 0, sizeof(action_replay.old));
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memset(action_replay.data, 0, sizeof(action_replay.data));
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memset(action_replay.addr, 0, sizeof(action_replay.addr));
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/* by default, internal ROM is mapped at $000000-$00FFFF */
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m68k.memory_map[0].base = action_replay.rom;
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/* reset internal RAM on power-on */
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if (hard)
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{
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memset(action_replay.ram,0xff,0x10000);
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}
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}
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}
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}
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int areplay_get_status(void)
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{
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if (action_replay.enabled)
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{
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return action_replay.status;
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}
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return -1;
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}
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void areplay_set_status(int status)
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{
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if (action_replay.enabled)
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{
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/* no Trainer mode for normal Action Replay */
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if ((action_replay.enabled == TYPE_AR) && (status == AR_SWITCH_TRAINER))
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{
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status = AR_SWITCH_OFF;
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}
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/* check status changes */
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switch (status)
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{
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case AR_SWITCH_OFF:
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case AR_SWITCH_TRAINER:
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{
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/* check that patches were previously enabled */
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if (action_replay.status == AR_SWITCH_ON)
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{
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/* restore original data */
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*(uint16 *)(cart.rom + action_replay.addr[0]) = action_replay.old[0];
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*(uint16 *)(cart.rom + action_replay.addr[1]) = action_replay.old[1];
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*(uint16 *)(cart.rom + action_replay.addr[2]) = action_replay.old[2];
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*(uint16 *)(cart.rom + action_replay.addr[3]) = action_replay.old[3];
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}
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break;
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}
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case AR_SWITCH_ON:
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{
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/* check that patches were previously disabled */
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if (action_replay.status != AR_SWITCH_ON)
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{
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/* decode patch data */
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action_replay.data[0] = action_replay.regs[0];
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action_replay.data[1] = action_replay.regs[4];
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action_replay.data[2] = action_replay.regs[7];
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action_replay.data[3] = action_replay.regs[10];
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/* decode patch address ($000000-$7fffff) */
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action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x3f00) << 8)) << 1;
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action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x3f00) << 8)) << 1;
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action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x3f00) << 8)) << 1;
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action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x3f00) << 8)) << 1;
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/* save original data */
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action_replay.old[0] = *(uint16 *)(cart.rom + action_replay.addr[0]);
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action_replay.old[1] = *(uint16 *)(cart.rom + action_replay.addr[1]);
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action_replay.old[2] = *(uint16 *)(cart.rom + action_replay.addr[2]);
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action_replay.old[3] = *(uint16 *)(cart.rom + action_replay.addr[3]);
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/* patch new data */
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*(uint16 *)(cart.rom + action_replay.addr[0]) = action_replay.data[0];
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*(uint16 *)(cart.rom + action_replay.addr[1]) = action_replay.data[1];
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*(uint16 *)(cart.rom + action_replay.addr[2]) = action_replay.data[2];
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*(uint16 *)(cart.rom + action_replay.addr[3]) = action_replay.data[3];
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}
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break;
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}
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default:
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{
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return;
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}
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}
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/* update status */
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action_replay.status = status;
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}
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}
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static void ar_write_regs(uint32 address, uint32 data)
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{
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/* register offset */
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int offset = (address & 0xffff) >> 1;
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if (offset > 12)
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{
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m68k_unused_16_w(address,data);
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return;
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}
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/* update internal register */
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action_replay.regs[offset] = data;
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/* MODE register */
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if (action_replay.regs[3] == 0xffff)
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{
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/* check switch status */
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if (action_replay.status == AR_SWITCH_ON)
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{
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/* reset existing patches */
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areplay_set_status(AR_SWITCH_OFF);
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areplay_set_status(AR_SWITCH_ON);
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}
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/* enable Cartridge ROM */
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m68k.memory_map[0].base = cart.rom;
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}
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}
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static void ar_write_regs_2(uint32 address, uint32 data)
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{
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/* enable Cartridge ROM */
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if (((address & 0xff) == 0x78) && (data == 0xffff))
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{
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m68k.memory_map[0].base = cart.rom;
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}
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}
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static void ar_write_ram_8(uint32 address, uint32 data)
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{
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/* byte writes are handled as word writes, with LSB duplicated in MSB (/LWR is not used) */
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*(uint16 *)(action_replay.ram + (address & 0xfffe)) = (data | (data << 8));
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}
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