ekeeke cc056b92db [Core/Sound] fixed PSG power-on latched register (verified on VA4 MD1 hardware) ...

Initial test that indicated power-on latched register was noise attenuation register was flawed because it wasn't done after a "cold" power-on. It appears the latched value is not totally reseted when doing a quick power off/on cycle (which was done with initial test) and would keep last value being set.

2017-04-02 21:40:24 +02:00

..

blip_buf.c

[Core/Sound] optimized Blip Buffer implementation for stereo streams (thanks to David Knight for original idea)

2016-12-18 23:09:16 +01:00

blip_buf.h

[Core/Sound] optimized Blip Buffer implementation for stereo streams (thanks to David Knight for original idea)

2016-12-18 23:09:16 +01:00

eq.c

rearranged core & back-end specific code (part 2)

2013-06-17 22:31:31 +02:00

eq.h

rearranged core & back-end specific code (part 2)

2013-06-17 22:31:31 +02:00

psg.c

[Core/Sound] fixed PSG power-on latched register (verified on VA4 MD1 hardware)

2017-04-02 21:40:24 +02:00

psg.h

[Core/Sound] improved accuracy of SN76489 core

2017-03-28 16:15:45 +02:00

sound.c

[Core/Sound] rewrote PSG core from scratch & replaced deprecated "PSG boot noise" option with optional Hiqh Quality PSG resampling

2016-12-18 23:36:59 +01:00

sound.h

[Core/Sound] optimized Blip Buffer implementation for stereo streams (thanks to David Knight for original idea)

2016-12-18 23:09:16 +01:00

ym2413.c

[Core/MS] improved emulation of Japanese Master System I/O chip (315-5297)

2014-11-23 20:30:27 +01:00

ym2413.h

[Core/MS] improved emulation of Japanese Master System I/O chip (315-5297)

2014-11-23 20:30:27 +01:00

ym2612.c

[Core/Sound]

2017-03-28 16:19:55 +02:00

ym2612.h

rearranged core & back-end specific code (part 2)

2013-06-17 22:31:31 +02:00