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https://github.com/ekeeke/Genesis-Plus-GX.git
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2b78421402
------ * improved 68k accuracy (initial reset timing + auto-vectored interrupts handling). * modified Z80 & 68k cores to directly use external cycle count instead of intermediate counters. * improved Z80 & 68k cpu execution/synchronization accuracy, now use Master Clock as common clock reference. * improved PSG & FM chips synchronization with CPU execution (fixed point precision). * completely rewrote sound output processing & mixing: sound chips are now clocked with exact output frame rate to ensure 100% smooth video & audio playback, with no lag or skipping, while still rendering an accurate number of samples per frame. This will also make fast-forward implementation (video AND sound) more trivial. * improved color accuracy in VDP highlight mode to match results observed on real hardware. * improved sprites processing timing accuracy: fixes (un)masked sprites in Mickey Mania (3D level), Sonic 2 (VS mode). * improved horizontal blanking & HINT/VINT occurrence timing accuracy, as measured on real hardware. * improved H-Counter accuracy in 40-cell mode, as measured on real hardware. * optimized Z80 bus status signals * usual code cleanup [GCN/WII] --------- fixed ASNDLIB exit when returning to game fixed audio/video startup sync modified audio back-end engine according to new audio processing core (see above)
61 lines
1.8 KiB
C
61 lines
1.8 KiB
C
#ifndef Z80_H_
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#define Z80_H_
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#include "cpuintrf.h"
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enum
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{
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Z80_PC, Z80_SP,
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Z80_A, Z80_B, Z80_C, Z80_D, Z80_E, Z80_H, Z80_L,
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Z80_AF, Z80_BC, Z80_DE, Z80_HL,
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Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2,
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Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT,
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Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3, Z80_WZ
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};
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enum {
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Z80_TABLE_op,
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Z80_TABLE_cb,
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Z80_TABLE_ed,
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Z80_TABLE_xy,
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Z80_TABLE_xycb,
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Z80_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */
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};
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/****************************************************************************/
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/* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh */
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/* register is calculated as follows: refresh=(Z80.r&127)|(Z80.r2&128) */
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/****************************************************************************/
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typedef struct
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{
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PAIR pc,sp,af,bc,de,hl,ix,iy,wz;
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PAIR af2,bc2,de2,hl2;
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UINT8 r,r2,iff1,iff2,halt,im,i;
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UINT8 nmi_state; /* nmi line state */
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UINT8 nmi_pending; /* nmi pending */
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UINT8 irq_state; /* irq line state */
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UINT8 after_ei; /* are we in the EI shadow? */
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const struct z80_irq_daisy_chain *daisy;
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int (*irq_callback)(int irqline);
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} Z80_Regs;
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extern Z80_Regs Z80;
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void z80_init(int index, int clock, const void *config, int (*irqcallback)(int));
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void z80_reset (void);
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void z80_exit (void);
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void z80_run(int cycles);
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void z80_burn(int cycles);
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void z80_get_context (void *dst);
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void z80_set_context (void *src);
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void z80_set_irq_line(int irqline, int state);
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unsigned int cpu_readport16(unsigned int port);
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void cpu_writeport16(unsigned int port, unsigned int data);
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unsigned int cpu_readmem16(unsigned int address);
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void cpu_writemem16(unsigned int address, unsigned int data);
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#endif
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