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62f1204476
Genesis Plus GX 1.6.0 ---------------------- [Core/Sound] --------------- * added YM2413 emulation in Master System compatibility mode. * fixed SN76489 noise boost initialization. * minor YM2612 core optimizations. [Core/VDP] --------------- * added accurate emulation of SG-1000, Master System (315-5124, 315-5246) & Game Gear VDP. * added support for all TMS9918 rendering modes. * improved Mega Drive VDP timings accuracy in Master System Compatibility mode. * fixed color palette initialization. * fixed shifted sprites rendering in Mode 4. * modified pixel rendering support (pixel depth is now forced at compilation time). [Core/CPU] --------------- * optimized 68k core (rewrote 68k interrupt handling, removed multiple CPU types support & unused code) for 5~8% speed improvment [Core/IO] --------------- * added accurate emulation of Master System (315-5216, 315-5237, 315-5297) & Game Gear I/O controllers. * added Terebi Oekaki tablet emulation. * improved Mouse emulation (fixes mouse support in Cannon Fodder). * improved Justifier emulation (fixes gun support in Lethal Enforcers 2). * improved 6-Buttons control pad emulation (fixes Duke Nukem 3D) * modified lightgun emulation to use common key inputs for all devices. * 2-buttons controller is now picked by default for Master System games. [Core/MD] --------------- * added copy-protection hardware emulation for some new dumped games (Tiny Toon Adventures 3, Mighty Morphin Power Rangers & The Battle of Red Cliffs). * added Game Toshokan in EEPROM database (verified on real cartridge). * fixed Micro Machines 2 - Turbo Tournament EEPROM size (verified on real cartridge). * modified SRAM banswitch hardware emulation to be more compatible with some hacks. [Core/MS] --------------- * added Cyborg Z to Korean mapper database. [Core/GG] --------------- * added 93C46 EEPROM emulation (Majors Pro Baseball, World Series Baseball & World Series Baseball 95). [Core/General] --------------- * added support for .mdx ROM format. * added Game Gear & SG-1000 ROM support. * added accurate emulation of SG-1000, Master System (I, II) & Game Gear hardware models for 100% compatibility. * updated to new Genesis Plus license (see http://cgfm2.emuviews.com/) * removed DOS port * various code cleanup. [Gamecube/Wii] --------------- * IMPORTANT: cheats, screenshots & save files are now stored in console-specific directories (ex: /snaps/md, /cheats/ms, /saves/gg, ...) * added 8-bit Action Replay & Game Genie codes support (for Master System & Game Gear games). * improved audio/video synchronization for PAL games in 50Hz TV modes (now use VSYNC like NTSC games in 60hz modes). * improved gun cursor positioning accuracy. * improved horizontal scaling & screenshots rendering in H32 mode. * fixed a bug with ROM file extension handling that would affect cheats, snapshots, sram & savestate files. * removed ARAM/injected ROM support (unused). * removed WPAD_ and PAD_ update from VSYNC callback. * increased GCC inlining limits for some speed improvment. * compiled with devkitPPC r24 & libogc 1.8.7.
250 lines
9.5 KiB
C
250 lines
9.5 KiB
C
#ifndef M68K__HEADER
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#define M68K__HEADER
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/* ======================================================================== */
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/* ========================= LICENSING & COPYRIGHT ======================== */
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/* ======================================================================== */
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/*
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* MUSASHI
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* Version 3.32
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*
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* A portable Motorola M680x0 processor emulation engine.
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* Copyright Karl Stenerud. All rights reserved.
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*
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* This code may be freely used for non-commercial purposes as long as this
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* copyright notice remains unaltered in the source code and any binary files
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* containing this code in compiled form.
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*
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* All other licensing terms must be negotiated with the author
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* (Karl Stenerud).
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*
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* The latest version of this code can be obtained at:
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* http://kstenerud.cjb.net
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*/
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/* Modified by Eke-Eke for Genesis Plus GX:
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- removed unused stuff to reduce memory usage / optimize execution (multiple CPU types support, NMI support, ...)
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- moved stuff to compile statically in a single object file
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- implemented support for global cycle count (shared by 68k & Z80 CPU)
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- added support for interrupt latency (Sesame's Street Counting Cafe, Fatal Rewind)
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- added proper cycle use on reset
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- added cycle accurate timings for MUL/DIV instructions (thanks to Jorge Cwik !)
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- fixed undocumented flags for DIV instructions (Blood Shot)
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*/
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/* ======================================================================== */
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/* ============================= CONFIGURATION ============================ */
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/* ======================================================================== */
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/* Import the configuration for this build */
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#include "m68kconf.h"
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/* ======================================================================== */
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/* ============================ GENERAL DEFINES =========================== */
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/* ======================================================================== */
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/* There are 7 levels of interrupt to the 68K.
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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*/
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#define M68K_IRQ_NONE 0
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#define M68K_IRQ_1 1
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#define M68K_IRQ_2 2
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#define M68K_IRQ_3 3
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#define M68K_IRQ_4 4
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#define M68K_IRQ_5 5
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#define M68K_IRQ_6 6
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#define M68K_IRQ_7 7
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/* Special interrupt acknowledge values.
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* Use these as special returns from the interrupt acknowledge callback
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* (specified later in this header).
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*/
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/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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* acknowledge cycle instead of DTACK.
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*/
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#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
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/* Causes the spurious interrupt vector (0x18) to be taken
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* This happens in a real 68K if BERR is asserted during the interrupt
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* acknowledge cycle (i.e. no devices responded to the acknowledge).
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*/
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#define M68K_INT_ACK_SPURIOUS 0xfffffffe
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/* Registers used by m68k_get_reg() and m68k_set_reg() */
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typedef enum
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{
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/* Real registers */
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M68K_REG_D0, /* Data registers */
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M68K_REG_D1,
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M68K_REG_D2,
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M68K_REG_D3,
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M68K_REG_D4,
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M68K_REG_D5,
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M68K_REG_D6,
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M68K_REG_D7,
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M68K_REG_A0, /* Address registers */
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M68K_REG_A1,
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M68K_REG_A2,
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M68K_REG_A3,
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M68K_REG_A4,
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M68K_REG_A5,
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M68K_REG_A6,
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M68K_REG_A7,
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M68K_REG_PC, /* Program Counter */
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M68K_REG_SR, /* Status Register */
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M68K_REG_SP, /* The current Stack Pointer (located in A7) */
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M68K_REG_USP, /* User Stack Pointer */
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M68K_REG_ISP, /* Interrupt Stack Pointer */
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#if M68K_EMULATE_PREFETCH
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/* Assumed registers */
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/* These are cheat registers which emulate the 1-longword prefetch
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* present in the 68000 and 68010.
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*/
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M68K_REG_PREF_ADDR, /* Last prefetch address */
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M68K_REG_PREF_DATA, /* Last prefetch data */
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#endif
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/* Convenience registers */
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M68K_REG_IR, /* Instruction register */
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} m68k_register_t;
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/* ======================================================================== */
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/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
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/* ======================================================================== */
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#include "macros.h"
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/* 68k memory map structure */
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typedef struct
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{
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unsigned char *base; /* direct memory access (ROM, RAM) */
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unsigned int (*read8)(unsigned int address); /* I/O byte read access */
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unsigned int (*read16)(unsigned int address); /* I/O word read access */
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void (*write8)(unsigned int address, unsigned int data); /* I/O byte write access */
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void (*write16)(unsigned int address, unsigned int data); /* I/O word write access */
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} _m68k_memory_map;
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/* 68k memory map */
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_m68k_memory_map m68k_memory_map[256];
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/* Read data immediately following the PC */
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#define m68k_read_immediate_16(address) *(uint16 *)(m68k_memory_map[((address)>>16)&0xff].base + ((address) & 0xffff))
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#define m68k_read_immediate_32(address) (m68k_read_immediate_16(address) << 16) | (m68k_read_immediate_16(address+2))
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/* Read data relative to the PC */
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#define m68k_read_pcrelative_8(address) READ_BYTE(m68k_memory_map[((address)>>16)&0xff].base, (address) & 0xffff)
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#define m68k_read_pcrelative_16(address) m68k_read_immediate_16(address)
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#define m68k_read_pcrelative_32(address) m68k_read_immediate_32(address)
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/* ======================================================================== */
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/* ============================== CALLBACKS =============================== */
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/* ======================================================================== */
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/* These functions allow you to set callbacks to the host when specific events
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* occur. Note that you must enable the corresponding value in m68kconf.h
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* in order for these to do anything useful.
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* Note: I have defined default callbacks which are used if you have enabled
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* the corresponding #define in m68kconf.h but either haven't assigned a
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* callback or have assigned a callback of NULL.
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*/
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#if M68K_EMULATE_INT_ACK == OPT_ON
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/* Set the callback for an interrupt acknowledge.
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* You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
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* The CPU will call the callback with the interrupt level being acknowledged.
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* The host program must return either a vector from 0x02-0xff, or one of the
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* special interrupt acknowledge values specified earlier in this header.
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* If this is not implemented, the CPU will always assume an autovectored
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* interrupt, and will automatically clear the interrupt request when it
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* services the interrupt.
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* Default behavior: return M68K_INT_ACK_AUTOVECTOR.
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*/
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void m68k_set_int_ack_callback(int (*callback)(int int_level));
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#endif
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#if M68K_EMULATE_RESET == OPT_ON
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/* Set the callback for the RESET instruction.
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* You must enable M68K_EMULATE_RESET in m68kconf.h.
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* The CPU calls this callback every time it encounters a RESET instruction.
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* Default behavior: do nothing.
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*/
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void m68k_set_reset_instr_callback(void (*callback)(void));
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#endif
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#if M68K_TAS_HAS_CALLBACK == OPT_ON
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/* Set the callback for the TAS instruction.
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* You must enable M68K_TAS_HAS_CALLBACK in m68kconf.h.
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* The CPU calls this callback every time it encounters a TAS instruction.
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* Default behavior: return 1, allow writeback.
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*/
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void m68k_set_tas_instr_callback(int (*callback)(void));
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#endif
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#if M68K_EMULATE_FC == OPT_ON
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/* Set the callback for CPU function code changes.
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* You must enable M68K_EMULATE_FC in m68kconf.h.
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* The CPU calls this callback with the function code before every memory
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* access to set the CPU's function code according to what kind of memory
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* access it is (supervisor/user, program/data and such).
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* Default behavior: do nothing.
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*/
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void m68k_set_fc_callback(void (*callback)(unsigned int new_fc));
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#endif
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/* ======================================================================== */
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/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
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/* ======================================================================== */
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/* Do whatever initialisations the core requires. Should be called
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* at least once at init time.
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*/
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extern void m68k_init(void);
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/* Pulse the RESET pin on the CPU.
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* You *MUST* reset the CPU at least once to initialize the emulation
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*/
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extern void m68k_pulse_reset(void);
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/* Run until given cycle count is reached */
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extern void m68k_run(unsigned int cycles);
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/* Set the IPL0-IPL2 pins on the CPU (IRQ).
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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* Setting IRQ to 0 will clear an interrupt request.
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*/
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extern void m68k_update_irq(unsigned int mask);
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extern void m68k_set_irq(unsigned int int_level);
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extern void m68k_set_irq_delay(unsigned int int_level);
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/* Halt the CPU as if you pulsed the HALT pin. */
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extern void m68k_pulse_halt(void);
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/* Peek at the internals of a CPU context. This can either be a context
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* retrieved using m68k_get_context() or the currently running context.
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* If context is NULL, the currently running CPU context will be used.
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*/
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extern unsigned int m68k_get_reg(m68k_register_t reg);
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/* Poke values into the internals of the currently running CPU context */
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extern void m68k_set_reg(m68k_register_t reg, unsigned int value);
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/* ======================================================================== */
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/* ============================== END OF FILE ============================= */
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/* ======================================================================== */
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#endif /* M68K__HEADER */
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