mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-09-10 16:53:15 +02:00
246 lines
6.2 KiB
C
246 lines
6.2 KiB
C
/***************************************************************************************
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* Genesis Plus 1.2a
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* Genesis internals & Bus controller
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* modified by Eke-Eke (compatibility fixes & additional code), GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "shared.h"
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uint8 *cart_rom; /* cart_rom NEED to be previously dynamically allocated */
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uint8 bios_rom[0x800];
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uint8 work_ram[0x10000]; /* 68K work RAM */
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uint8 zram[0x2000]; /* Z80 work RAM */
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uint8 zbusreq; /* /BUSREQ from Z80 */
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uint8 zreset; /* /RESET to Z80 */
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uint8 zbusack; /* /BUSACK to Z80 */
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uint8 zirq; /* /IRQ to Z80 */
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uint32 zbank; /* Address of Z80 bank window */
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uint8 gen_running;
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uint32 genromsize;
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uint32 rom_size;
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int32 resetline;
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uint8 *rom_readmap[8];
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/*--------------------------------------------------------------------------*/
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/* Init, reset, shutdown functions */
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/*--------------------------------------------------------------------------*/
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void set_softreset(void)
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{
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resetline = (int) ((double) (lines_per_frame - 1) * rand() / (RAND_MAX + 1.0));
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}
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void gen_init (void)
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{
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int i;
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/* initialize CPUs */
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m68k_set_cpu_type (M68K_CPU_TYPE_68000);
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m68k_init();
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z80_init(0,0,0,z80_irq_callback);
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/* default 68000 mapping */
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for (i=16; i<24; i++)
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{
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m68k_readmap_8[i] = ILLEGAL;
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m68k_readmap_16[i] = ILLEGAL;
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m68k_writemap_8[i] = ILLEGAL;
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m68k_writemap_16[i] = ILLEGAL;
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}
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/* Z80, I/O, CONTROL */
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m68k_readmap_8[20] = SYSTEM_IO;
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m68k_readmap_16[20] = SYSTEM_IO;
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m68k_writemap_8[20] = SYSTEM_IO;
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m68k_writemap_16[20] = SYSTEM_IO;
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/* SEGA PICO */
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if (system_hw == SYSTEM_PICO)
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{
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m68k_readmap_8[16] = PICO_HW;
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m68k_readmap_16[16] = PICO_HW;
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m68k_writemap_8[16] = PICO_HW;
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m68k_writemap_16[16] = PICO_HW;
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/* Notaz: there is no IO CONTROL area (Z80/YM2612/IO) */
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m68k_readmap_8[20] = UNUSED;
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m68k_readmap_16[20] = UNUSED;
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m68k_writemap_8[20] = UNUSED;
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m68k_writemap_16[20] = UNUSED;
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}
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/* VDP */
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for (i=24; i<28; i++)
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{
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m68k_readmap_8[i] = VDP;
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m68k_readmap_16[i] = VDP;
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m68k_writemap_8[i] = VDP;
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m68k_writemap_16[i] = VDP;
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}
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/* WRAM */
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for (i=28; i<32; i++)
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{
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m68k_readmap_8[i] = WRAM;
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m68k_readmap_16[i] = WRAM;
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m68k_writemap_8[i] = WRAM;
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m68k_writemap_16[i] = WRAM;
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}
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}
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void gen_reset (unsigned int hard_reset)
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{
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if (hard_reset)
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{
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/* Clear RAM */
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memset (work_ram, 0, sizeof (work_ram));
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memset (zram, 0, sizeof (zram));
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/* Reset ROM mapping */
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if (config.bios_enabled == 3)
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{
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rom_readmap[0] = &bios_rom[0];
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rom_size = 0x800;
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}
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else
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{
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rom_readmap[0] = &cart_rom[0];
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rom_size = genromsize;
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}
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uint8 i;
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for (i=1; i<8; i++) rom_readmap[i] = &cart_rom[i << 19];
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}
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gen_running = 1;
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zreset = 0; /* Z80 is reset */
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zbusreq = 0; /* Z80 has control of the Z bus */
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zbusack = 1; /* Z80 is busy using the Z bus */
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zbank = 0; /* Assume default bank is 000000-007FFF */
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zirq = 0; /* No interrupts occuring */
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resetline = -1;
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/* Reset CPUs */
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m68k_pulse_reset ();
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z80_reset ();
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_YM2612_Reset();
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#ifdef NGC
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/* register SOFTRESET */
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SYS_SetResetCallback(set_softreset);
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#endif
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}
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void gen_shutdown (void)
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{
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}
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/*-----------------------------------------------------------------------
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Bus controller chip functions
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-----------------------------------------------------------------------*/
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unsigned int gen_busack_r (void)
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{
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return zbusack;
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}
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void gen_busreq_w (unsigned int state)
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{
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int z80_cycles_to_run;
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input_raz (); /* from Gens */
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if (state)
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{
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/* Bus Request */
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if (!zbusreq && zreset)
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{
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/* Z80 stopped */
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/* z80 was ON during the last 68k cycles */
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/* we execute the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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z80_run(z80_cycles_to_run);
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}
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}
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else
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{
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/* Bus released */
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if (zbusreq && zreset)
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{
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/* Z80 started */
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/* z80 was OFF during the last 68k cycles */
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/* we burn the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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count_z80 = z80_cycles_to_run;
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}
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}
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zbusreq = state;
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zbusack = 1 ^ (zbusreq & zreset);
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}
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void gen_reset_w (unsigned int state)
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{
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int z80_cycles_to_run;
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if (state)
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{
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/* stop RESET process */
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if (!zbusreq && !zreset)
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{
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/* Z80 started */
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/* z80 was OFF during the last 68k cycles */
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/* we burn the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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count_z80 = z80_cycles_to_run;
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}
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}
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else
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{
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/* start RESET process */
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if (!zbusreq && zreset)
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{
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/* Z80 stopped */
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/* z80 was ON during the last 68k cycles */
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/* we execute the appropriate number of z80 cycles */
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z80_cycles_to_run = line_z80 + ((count_m68k - line_m68k)*7)/15;
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z80_run(z80_cycles_to_run);
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}
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/* Reset Z80 & YM2612 */
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_YM2612_Reset();
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z80_reset ();
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}
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zreset = state;
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zbusack = 1 ^ (zbusreq & zreset);
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}
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void gen_bank_w (unsigned int state)
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{
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zbank = ((zbank >> 1) | ((state & 1) << 23)) & 0xFF8000;
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}
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int z80_irq_callback (int param)
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{
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zirq = 0;
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z80_set_irq_line (0, CLEAR_LINE);
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return 0xFF;
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}
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