mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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367 lines
8.9 KiB
C
367 lines
8.9 KiB
C
/***************************************************************************************
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* Genesis Plus 1.2a
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* M68k Bank access from Z80
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* modified by Eke-Eke (compatibility fixes & additional code), GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "shared.h"
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/*
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Handlers for access to unused addresses and those which make the
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machine lock up.
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*/
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static inline void z80bank_unused_w(unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error("Z80 bank unused write %06X = %02X\n", address, data);
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#endif
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}
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static inline unsigned int z80bank_unused_r(unsigned int address)
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{
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#ifdef LOGERROR
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error("Z80 bank unused read %06X\n", address);
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#endif
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return (address & 1) ? 0x00 : 0xFF;
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}
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static inline void z80bank_lockup_w(unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error("Z80 bank lockup write %06X = %02X\n", address, data);
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#endif
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gen_running = config.force_dtack;
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}
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static inline unsigned int z80bank_lockup_r(unsigned int address)
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{
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#ifdef LOGERROR
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error("Z80 bank lockup read %06X\n", address);
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#endif
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gen_running = config.force_dtack;
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return 0xFF;
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}
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/*
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Z80 memory handlers
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*/
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void z80_write_banked_memory (unsigned int address, unsigned int data)
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{
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int offset = address >> 19;
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switch (m68k_writemap_8[offset])
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{
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case VDP:
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/* Valid VDP addresses */
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if (((address >> 16) & 0x07) == 0)
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{
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switch (address & 0xff)
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{
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case 0x00: /* Data port */
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case 0x01:
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case 0x02:
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case 0x03:
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vdp_data_w(data << 8 | data);
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return;
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case 0x04: /* Control port */
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case 0x05:
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case 0x06:
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case 0x07:
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vdp_ctrl_w(data << 8 | data);
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return;
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case 0x10: /* Unused */
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case 0x12:
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case 0x14:
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case 0x16:
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z80bank_unused_w(address, data);
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return;
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case 0x11: /* PSG */
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case 0x13:
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case 0x15:
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case 0x17:
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psg_write(0, data);
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return;
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case 0x18: /* Unused */
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case 0x19:
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case 0x1a:
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case 0x1b:
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z80bank_unused_w(address, data);
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return;
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case 0x1c: /* Test register */
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case 0x1d:
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case 0x1e:
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case 0x1f:
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vdp_test_w(data << 8 | data);
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return;
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default: /* Invalid address */
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z80bank_lockup_w(address, data);
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return;
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}
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}
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/* Invalid address */
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z80bank_lockup_w(address, data);
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return;
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case SYSTEM_IO:
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{
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unsigned int base = address >> 8;
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/* Z80 (access prohibited) */
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if (base <= 0xa0ff)
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{
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z80bank_lockup_w(address, data);
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return;
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}
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/* CONTROL registers */
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if (base <= 0xa1ff)
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{
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switch (base & 0xff)
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{
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case 0x00: /* I/O chip (only gets /LWR) */
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if ((address & 0xe1) == 0x01) io_write((address >> 1) & 0x0f, data);
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else z80bank_unused_w(address, data);
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return;
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case 0x11: /* BUSREQ */
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if (address & 1) z80bank_unused_w(address, data);
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else gen_busreq_w(data & 1);
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return;
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case 0x12: /* RESET */
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if (address & 1) z80bank_unused_w(address, data);
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else gen_reset_w(data & 1);
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return;
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case 0x30: /* TIME */
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if (cart_hw.time_w) return cart_hw.time_w(address, data);
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else z80bank_unused_w(address, data);
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return;
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case 0x41: /* BOOTROM */
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if (address & 1)
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{
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if (data & 1)
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{
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rom_readmap[0] = &cart_rom[0];
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rom_size = genromsize;
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}
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else
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{
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rom_readmap[0] = &bios_rom[0];
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rom_size = 0x800;
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}
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if (!(config.bios_enabled & 2))
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{
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config.bios_enabled |= 2;
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memcpy(bios_rom, cart_rom, 0x800);
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memset(cart_rom, 0, 0x500000);
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}
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}
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else z80bank_unused_w (address, data);
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return;
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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z80bank_unused_w(address, data);
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return;
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default: /* Invalid address */
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z80bank_lockup_w(address, data);
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return;
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}
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}
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/* Invalid address */
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z80bank_lockup_w(address, data);
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return;
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}
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case ROM:
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WRITE_BYTE(rom_readmap[offset], address & 0x7ffff, data);
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return;
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case SRAM:
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if (address <= sram.end) WRITE_BYTE(sram.sram, address - sram.start, data);
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else z80bank_unused_w(address, data);
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return;
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case EEPROM:
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if ((address == eeprom.type.sda_in_adr) || (address == eeprom.type.scl_adr)) eeprom_write(address, data, 0);
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else z80bank_unused_w(address, data);
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return;
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case CART_HW:
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cart_hw.regs_w(address, data);
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return;
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case UNUSED:
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z80bank_unused_w(address, data);
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return;
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case ILLEGAL:
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z80bank_lockup_w(address, data);
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return;
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default: /* WRAM */
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z80bank_unused_w(address, data);
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return;
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}
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}
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unsigned int z80_read_banked_memory(unsigned int address)
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{
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int offset = address >> 19;
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switch (m68k_readmap_8[offset])
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{
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case WRAM: /* NOTE: can't be read on some Genesis models (!)*/
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return z80bank_unused_r(address) | 0xff;
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case SYSTEM_IO:
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{
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unsigned int base = address >> 8;
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/* Z80 (access prohibited) */
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if (base <= 0xa0ff) return z80bank_lockup_r(address);
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/* I/O & CONTROL registers */
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if (base <= 0xa1ff)
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{
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switch (base & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0) return z80bank_unused_r(address);
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return (io_read((address >> 1) & 0x0f));
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case 0x11: /* BUSACK */
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if (address & 0x01) return 0xff;
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else return (zbusack | 0xfe);
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case 0x30: /* TIME */
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if (cart_hw.time_r) return cart_hw.time_r(address);
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else z80bank_unused_r(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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return z80bank_unused_r(address);
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default: /* Invalid address */
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return z80bank_lockup_r(address);
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}
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}
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/* Invalid address */
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return z80bank_lockup_r(address);
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}
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case VDP:
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/* Valid VDP addresses */
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if (((address >> 16) & 0x07) == 0)
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{
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switch (address & 0xff)
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{
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case 0x00: /* DATA */
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case 0x02:
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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case 0x03:
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return (vdp_data_r() & 0xff);
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case 0x04: /* CTRL */
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case 0x06:
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return (0xfc | ((vdp_ctrl_r() >> 8) & 3));
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case 0x05: /* CTRL */
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case 0x07:
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return (vdp_ctrl_r() & 0xff);
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case 0x08: /* HVC */
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case 0x0a:
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case 0x0c:
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case 0x0e:
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return (vdp_hvc_r() >> 8);
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case 0x09: /* HVC */
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case 0x0b:
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case 0x0d:
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case 0x0f:
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return (vdp_hvc_r() & 0xff);
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case 0x18: /* Unused */
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case 0x19:
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case 0x1a:
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case 0x1b:
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case 0x1c:
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case 0x1d:
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case 0x1e:
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case 0x1f:
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return (z80bank_unused_r(address) | 0xff);
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default: /* Invalid address */
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return z80bank_lockup_r(address);
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}
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}
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/* Invalid address */
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return (z80bank_lockup_r (address));
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case SRAM:
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if (address <= sram.end) return READ_BYTE(sram.sram, address - sram.start);
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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case EEPROM:
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if (address == eeprom.type.sda_out_adr) return eeprom_read(address, 0);
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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case CART_HW:
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return cart_hw.regs_r(address);
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case UNUSED:
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return z80bank_unused_r(address);
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case ILLEGAL:
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return z80bank_lockup_r(address);
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case UMK3_HACK:
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return READ_BYTE(&cart_rom[offset<<19], address & 0x7ffff);
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default: /* ROM */
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return READ_BYTE(rom_readmap[offset], address & 0x7ffff);
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}
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}
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