mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-09-19 04:39:42 +02:00
2b78421402
------ * improved 68k accuracy (initial reset timing + auto-vectored interrupts handling). * modified Z80 & 68k cores to directly use external cycle count instead of intermediate counters. * improved Z80 & 68k cpu execution/synchronization accuracy, now use Master Clock as common clock reference. * improved PSG & FM chips synchronization with CPU execution (fixed point precision). * completely rewrote sound output processing & mixing: sound chips are now clocked with exact output frame rate to ensure 100% smooth video & audio playback, with no lag or skipping, while still rendering an accurate number of samples per frame. This will also make fast-forward implementation (video AND sound) more trivial. * improved color accuracy in VDP highlight mode to match results observed on real hardware. * improved sprites processing timing accuracy: fixes (un)masked sprites in Mickey Mania (3D level), Sonic 2 (VS mode). * improved horizontal blanking & HINT/VINT occurrence timing accuracy, as measured on real hardware. * improved H-Counter accuracy in 40-cell mode, as measured on real hardware. * optimized Z80 bus status signals * usual code cleanup [GCN/WII] --------- fixed ASNDLIB exit when returning to game fixed audio/video startup sync modified audio back-end engine according to new audio processing core (see above)
673 lines
16 KiB
C
673 lines
16 KiB
C
/***************************************************************************************
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* Genesis Plus
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* 68k memory handlers
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Eke-Eke (2007,2008,2009), additional code & fixes for the GCN/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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****************************************************************************************/
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#include "m68kcpu.h"
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#include "shared.h"
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uint32 m68k_read_bus_8(uint32 address)
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{
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#ifdef LOGERROR
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error("Unused read8 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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return m68k_read_pcrelative_8(REG_PC | (address&1));
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}
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uint32 m68k_read_bus_16(uint32 address)
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{
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#ifdef LOGERROR
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error("Unused read16 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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return m68k_read_pcrelative_16(REG_PC);
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}
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void m68k_unused_8_w (uint32 address, uint32 data)
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{
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#ifdef LOGERROR
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error("Unused write8 %08X = %02X (%08X)\n", address, data, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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}
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void m68k_unused_16_w (uint32 address, uint32 data)
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{
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#ifdef LOGERROR
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error("Unused write16 %08X = %04X (%08X)\n", address, data, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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}
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/*
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Functions to handle memory accesses which cause the Genesis to halt
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either temporarily (press RESET button to restart) or unrecoverably
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(cycle power to restart).
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*/
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void m68k_lockup_w_8 (uint32 address, uint32 data)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %02X (%08X)\n", address, data, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running)
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m68k_pulse_halt ();
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}
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void m68k_lockup_w_16 (uint32 address, uint32 data)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %04X (%08X)\n", address, data, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running)
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m68k_pulse_halt ();
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}
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uint32 m68k_lockup_r_8 (uint32 address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running)
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m68k_pulse_halt ();
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return -1;
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}
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uint32 m68k_lockup_r_16 (uint32 address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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#endif
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gen_running = config.force_dtack;
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if (!gen_running)
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m68k_pulse_halt ();
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return -1;
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}
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/* PICO data */
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static int pico_page[7] = {0x00,0x01,0x03,0x07,0x0F,0x1F,0x3F};
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/*--------------------------------------------------------------------------*/
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/* 68000 memory handlers */
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/*--------------------------------------------------------------------------*/
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/******* EEPROM **********************************************/
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uint32 eeprom_read_byte(uint32 address)
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{
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if (address == eeprom.type.sda_out_adr)
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return eeprom_read(address, 0);
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return READ_BYTE(cart.rom, address);
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}
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uint32 eeprom_read_word(uint32 address)
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{
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if (address == (eeprom.type.sda_out_adr & 0xfffffe))
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return eeprom_read(address, 1);
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return *(uint16 *)(cart.rom + address);
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}
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void eeprom_write_byte(uint32 address, uint32 data)
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{
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if ((address == eeprom.type.sda_in_adr) || (address == eeprom.type.scl_adr))
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eeprom_write(address, data, 0);
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else
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m68k_unused_8_w(address, data);
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}
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void eeprom_write_word(uint32 address, uint32 data)
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{
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if ((address == (eeprom.type.sda_in_adr&0xfffffe)) || (address == (eeprom.type.scl_adr&0xfffffe)))
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eeprom_write(address, data, 1);
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else
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m68k_unused_16_w (address, data);
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}
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/******* Z80 *************************************************/
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uint32 z80_read_byte(uint32 address)
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{
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/* Z80 bus is available ? */
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if (zstate ^ 3)
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return m68k_read_bus_8(address);
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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return fm_read(mcycles_68k, address & 3);
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case 3: /* MISC */
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if ((address & 0xff00) == 0x7f00)
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return m68k_lockup_r_8(address); /* VDP */
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return (m68k_read_bus_8(address) | 0xff);
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default: /* ZRAM */
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return zram[address & 0x1fff];
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}
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}
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uint32 z80_read_word(uint32 address)
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{
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/* Z80 bus is available ? */
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if (zstate ^ 3)
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return m68k_read_bus_16(address);
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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{
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int temp = fm_read(mcycles_68k, address & 3);
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return (temp << 8 | temp);
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}
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case 3: /* MISC */
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if ((address & 0xff00) == 0x7f00)
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return m68k_lockup_r_16(address); /* VDP */
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return (m68k_read_bus_16(address) | 0xffff);
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default: /* ZRAM */
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{
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int temp = zram[address & 0x1fff];
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return (temp << 8 | temp);
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}
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}
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}
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void z80_write_byte(uint32 address, uint32 data)
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{
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/* Z80 bus is available ? */
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if (zstate ^ 3)
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{
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m68k_unused_8_w(address, data);
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return;
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}
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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fm_write(mcycles_68k, address & 3, data);
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return;
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case 3:
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switch ((address >> 8) & 0x7f)
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{
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case 0x60: /* Bank register */
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gen_bank_w(data & 1);
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return;
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case 0x7f: /* VDP */
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m68k_lockup_w_8(address, data);
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return;
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default:
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m68k_unused_8_w(address, data);
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return;
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}
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default: /* ZRAM */
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zram[address & 0x1fff] = data;
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mcycles_68k+=8; /* Z80 bus latency (Pacman 2: New Adventures) */
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return;
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}
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}
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void z80_write_word(uint32 address, uint32 data)
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{
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/* Z80 bus is available ? */
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if (zstate ^ 3)
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{
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m68k_unused_16_w(address, data);
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return;
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}
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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fm_write (mcycles_68k, address & 3, data >> 8);
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return;
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case 3:
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switch ((address >> 8) & 0x7f)
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{
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case 0x60: /* Bank register */
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gen_bank_w ((data >> 8) & 1);
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return;
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case 0x7f: /* VDP */
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m68k_lockup_w_16(address, data);
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return;
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default:
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m68k_unused_16_w(address, data);
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return;
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}
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default: /* ZRAM */
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zram[address & 0x1fff] = data >> 8;
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return;
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}
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}
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/******* I/O & CTRL ******************************************/
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uint32 ctrl_io_read_byte(uint32 address)
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0)
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return m68k_read_bus_8(address);
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return (io_read((address >> 1) & 0x0f));
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case 0x11: /* BUSACK */
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if (address & 1)
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return m68k_read_bus_8(address);
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if (zstate ^ 3)
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return (m68k_read_pcrelative_8(REG_PC) | 0x01);
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return (m68k_read_pcrelative_8(REG_PC) & 0xfe);
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case 0x30: /* TIME */
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if (cart.hw.time_r)
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return ((address & 1) ? (cart.hw.time_r(address) & 0xff) : (cart.hw.time_r(address) >> 8));
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return m68k_read_bus_8(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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return m68k_read_bus_8(address);
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default: /* Invalid address */
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return m68k_lockup_r_8(address);
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}
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}
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uint32 ctrl_io_read_word(uint32 address)
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0)
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return m68k_read_bus_16(address);
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int temp = io_read((address >> 1) & 0x0f);
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return (temp << 8 | temp);
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}
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case 0x11: /* BUSACK */
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if (zstate ^ 3)
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return (m68k_read_pcrelative_16(REG_PC) | 0x100);
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return (m68k_read_pcrelative_16(REG_PC) & 0xfeff);
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case 0x30: /* TIME */
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if (cart.hw.time_r)
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return cart.hw.time_r(address);
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return m68k_read_bus_16(address);
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case 0x50: /* SVP */
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if (svp)
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{
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if ((address & 0xfd) == 0)
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return svp->ssp1601.gr[SSP_XST].h;
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if ((address & 0xff) == 4)
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{
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uint32 temp = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return temp;
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}
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}
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return m68k_read_bus_16(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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return m68k_read_bus_16(address);
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default: /* Invalid address */
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return m68k_lockup_r_16(address);
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}
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}
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void ctrl_io_write_byte(uint32 address, uint32 data)
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if ((address & 0xe1) == 0x01)
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io_write((address >> 1) & 0x0f, data); /* get /LWR only */
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else
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m68k_unused_8_w(address, data);
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return;
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case 0x11: /* BUSREQ */
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if (address & 1)
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m68k_unused_8_w(address, data);
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else
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gen_busreq_w(data & 1);
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return;
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case 0x12: /* RESET */
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if (address & 1)
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m68k_unused_8_w(address, data);
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else
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gen_reset_w(data & 1);
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return;
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case 0x30: /* TIME */
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cart.hw.time_w(address, data);
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return;
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case 0x41: /* BOOTROM */
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if (address & 1)
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{
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m68k_memory_map[0].base = (data & 1) ? cart.base : bios_rom;
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/* autodetect BIOS ROM file */
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if (!(config.bios_enabled & 2))
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{
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config.bios_enabled |= 2;
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memcpy(bios_rom, cart.rom, 0x800);
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memset(cart.rom, 0xff, cart.romsize);
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}
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}
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else
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{
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m68k_unused_8_w (address, data);
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}
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return;
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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m68k_unused_8_w(address, data);
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return;
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default: /* Invalid address */
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m68k_lockup_w_8(address, data);
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return;
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}
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}
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void ctrl_io_write_word(uint32 address, uint32 data)
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0)
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m68k_unused_16_w (address, data);
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else
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io_write ((address >> 1) & 0x0f, data & 0xff);
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return;
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case 0x11: /* BUSREQ */
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gen_busreq_w ((data >> 8) & 1);
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return;
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case 0x12: /* RESET */
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gen_reset_w ((data >> 8) & 1);
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return;
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case 0x50: /* SVP REGISTERS */
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if (svp)
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{
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if (address & 0xfd)
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{
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m68k_unused_16_w(address, data);
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}
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else
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{
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/* just guessing here (Notaz) */
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svp->ssp1601.gr[SSP_XST].h = data;
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svp->ssp1601.gr[SSP_PM0].h |= 2;
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svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
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}
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}
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else
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{
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m68k_unused_16_w (address, data);
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}
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return;
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case 0x30: /* TIME */
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cart.hw.time_w(address & 0xfe, data >> 8);
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cart.hw.time_w(address, data & 0xff);
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return;
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case 0x41: /* BOOTROM */
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m68k_memory_map[0].base = (data & 1) ? cart.base : bios_rom;
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/* autodetect BIOS ROM file */
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if (!(config.bios_enabled & 2))
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{
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config.bios_enabled |= 2;
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memcpy(bios_rom, cart.rom, 0x800);
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memset(cart.rom, 0xff, cart.romsize);
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}
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return;
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x44: /* RADICA */
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m68k_unused_16_w (address, data);
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return;
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default: /* Unused */
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m68k_lockup_w_16 (address, data);
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return;
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}
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}
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/******* VDP *************************************************/
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uint32 vdp_read_byte(uint32 address)
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{
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switch (address & 0xfd)
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{
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case 0x00: /* DATA */
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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return (vdp_data_r() & 0xff);
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case 0x04: /* CTRL */
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return ((m68k_read_pcrelative_8(REG_PC) & 0xfc) | ((vdp_ctrl_r() >> 8) & 3));
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case 0x05: /* CTRL */
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return (vdp_ctrl_r() & 0xff);
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case 0x08: /* HVC */
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case 0x0c:
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return (vdp_hvc_r() >> 8);
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|
case 0x09: /* HVC */
|
|
case 0x0d:
|
|
return (vdp_hvc_r() & 0xff);
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x19:
|
|
case 0x1c:
|
|
case 0x1d:
|
|
return m68k_read_bus_8(address);
|
|
|
|
default: /* Invalid address */
|
|
return m68k_lockup_r_8(address);
|
|
}
|
|
}
|
|
|
|
uint32 vdp_read_word(uint32 address)
|
|
{
|
|
switch (address & 0xfc)
|
|
{
|
|
case 0x00: /* DATA */
|
|
return vdp_data_r();
|
|
|
|
case 0x04: /* CTRL */
|
|
return ((vdp_ctrl_r() & 0x3FF) | (m68k_read_pcrelative_16(REG_PC) & 0xFC00));
|
|
|
|
case 0x08: /* HVC */
|
|
case 0x0c:
|
|
return vdp_hvc_r();
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x1c:
|
|
return m68k_read_bus_16(address);
|
|
|
|
default: /* Invalid address */
|
|
return m68k_lockup_r_16(address);
|
|
}
|
|
}
|
|
|
|
void vdp_write_byte(uint32 address, uint32 data)
|
|
{
|
|
switch (address & 0xfc)
|
|
{
|
|
case 0x00: /* Data port */
|
|
vdp_data_w(data << 8 | data);
|
|
return;
|
|
|
|
case 0x04: /* Control port */
|
|
vdp_ctrl_w(data << 8 | data);
|
|
return;
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14:
|
|
if (address & 1)
|
|
psg_write(mcycles_68k, data);
|
|
else
|
|
m68k_unused_8_w(address, data);
|
|
return;
|
|
|
|
case 0x18: /* Unused */
|
|
m68k_unused_8_w(address, data);
|
|
return;
|
|
|
|
case 0x1c: /* TEST register */
|
|
vdp_test_w(data << 8 | data);
|
|
return;
|
|
|
|
default: /* Invalid address */
|
|
m68k_lockup_w_8(address, data);
|
|
return;
|
|
}
|
|
}
|
|
|
|
void vdp_write_word(uint32 address, uint32 data)
|
|
{
|
|
switch (address & 0xfc)
|
|
{
|
|
case 0x00: /* DATA */
|
|
vdp_data_w(data);
|
|
return;
|
|
|
|
case 0x04: /* CTRL */
|
|
vdp_ctrl_w(data);
|
|
return;
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14:
|
|
psg_write(mcycles_68k, data & 0xff);
|
|
return;
|
|
|
|
case 0x18: /* Unused */
|
|
m68k_unused_16_w(address, data);
|
|
return;
|
|
|
|
case 0x1c: /* Test register */
|
|
vdp_test_w(data);
|
|
return;
|
|
|
|
default: /* Invalid address */
|
|
m68k_lockup_w_16 (address, data);
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
/******* PICO ************************************************/
|
|
|
|
uint32 pico_read_byte(uint32 address)
|
|
{
|
|
/* PICO */
|
|
switch (address & 0xff)
|
|
{
|
|
case 0x01: /* VERSION register */
|
|
return (0x40);
|
|
|
|
case 0x03: /* IO register */
|
|
{
|
|
uint8 retval = 0xff;
|
|
if (input.pad[0] & INPUT_B) retval &= ~0x10;
|
|
if (input.pad[0] & INPUT_A) retval &= ~0x80;
|
|
if (input.pad[0] & INPUT_UP) retval &= ~0x01;
|
|
if (input.pad[0] & INPUT_DOWN) retval &= ~0x02;
|
|
if (input.pad[0] & INPUT_LEFT) retval &= ~0x04;
|
|
if (input.pad[0] & INPUT_RIGHT) retval &= ~0x08;
|
|
retval &= ~0x20;
|
|
retval &= ~0x40;
|
|
return retval;
|
|
}
|
|
|
|
case 0x05: /* MSB PEN X coordinate */
|
|
return (input.analog[0][0] >> 8);
|
|
|
|
case 0x07: /* LSB PEN X coordinate */
|
|
return (input.analog[0][0] & 0xff);
|
|
|
|
case 0x09: /* MSB PEN Y coordinate */
|
|
return (input.analog[0][1] >> 8);
|
|
|
|
case 0x0b: /* LSB PEN Y coordinate */
|
|
return (input.analog[0][1] & 0xff);
|
|
|
|
case 0x0d: /* PAGE register */
|
|
return pico_page[pico_current]; /* TODO */
|
|
|
|
case 0x10: /* PCM registers */
|
|
case 0x11:
|
|
case 0x12:
|
|
case 0x13:
|
|
return 0x80; /* TODO */
|
|
|
|
default:
|
|
return m68k_read_bus_8(address);
|
|
}
|
|
}
|
|
|
|
uint32 pico_read_word(uint32 address)
|
|
{
|
|
return ((m68k_read_bus_8(address) << 8) | pico_read_byte(address | 1));
|
|
}
|