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Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V Tests. (#720) 

* Update PackageReferences.

* Improve Cnt_V Test. Tuneup Cls_V & Clz_V Tests.

Nit.

* Nit.

* Improve Dup_Gp & Ins_Gp Tests.

* Update for Saddlv_V Inst.

* Update for Saddlv_V Inst.

* Update for Saddlv_V Inst.
This commit is contained in:
LDj3SNuD 2019-07-08 16:55:37 +02:00 committed by gdkchan
parent 25e6a2e0ea
commit 7dddfbf688
3 changed files with 26 additions and 19 deletions
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21
Instructions/InstEmitSimdArithmetic.cs
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@ -2206,6 +2206,11 @@ namespace ChocolArm64.Instructions
EmitAddLongPairwise(context, signed: true, accumulate: false); EmitAddLongPairwise(context, signed: true, accumulate: false);
} }
public static void Saddlv_V(ILEmitterCtx context)
{
EmitVectorLongAcrossVectorOpSx(context, () => context.Emit(OpCodes.Add));
}
public static void Saddw_V(ILEmitterCtx context) public static void Saddw_V(ILEmitterCtx context)
{ {
if (Optimizations.UseSse41) if (Optimizations.UseSse41)
@ -3041,21 +3046,7 @@ namespace ChocolArm64.Instructions
public static void Uaddlv_V(ILEmitterCtx context) public static void Uaddlv_V(ILEmitterCtx context)
{ {
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; EmitVectorLongAcrossVectorOpZx(context, () => context.Emit(OpCodes.Add));
int bytes = op.GetBitsCount() >> 3;
int elems = bytes >> op.Size;
EmitVectorExtractZx(context, op.Rn, 0, op.Size);
for (int index = 1; index < elems; index++)
{
EmitVectorExtractZx(context, op.Rn, index, op.Size);
context.Emit(OpCodes.Add);
}
EmitScalarSet(context, op.Rd, op.Size + 1);
} }
public static void Uaddw_V(ILEmitterCtx context) public static void Uaddw_V(ILEmitterCtx context)

22
Instructions/InstEmitSimdHelper.cs
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@ -823,15 +823,29 @@ namespace ChocolArm64.Instructions
public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit) public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
{ {
EmitVectorAcrossVectorOp(context, emit, true); EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: false);
} }
public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit) public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
{ {
EmitVectorAcrossVectorOp(context, emit, false); EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: false);
} }
public static void EmitVectorAcrossVectorOp(ILEmitterCtx context, Action emit, bool signed) public static void EmitVectorLongAcrossVectorOpSx(ILEmitterCtx context, Action emit)
{
EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: true);
}
public static void EmitVectorLongAcrossVectorOpZx(ILEmitterCtx context, Action emit)
{
EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: true);
}
public static void EmitVectorAcrossVectorOp(
ILEmitterCtx context,
Action emit,
bool signed,
bool isLong)
{ {
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
@ -847,7 +861,7 @@ namespace ChocolArm64.Instructions
emit(); emit();
} }
EmitScalarSet(context, op.Rd, op.Size); EmitScalarSet(context, op.Rd, isLong ? op.Size + 1 : op.Size);
} }
public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit) public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)

2
OpCodeTable.cs
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@ -439,6 +439,8 @@ namespace ChocolArm64
SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V, typeof(OpCodeSimd64)); SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V, typeof(OpCodeSimd64));
SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V, typeof(OpCodeSimdReg64)); SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V, typeof(OpCodeSimdReg64));
SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64)); SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
SetA64("000011100x110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
SetA64("01001110<<110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64)); SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64)); SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64)); SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));