782 lines
23 KiB
C#
782 lines
23 KiB
C#
using ChocolArm64.Decoders;
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using ChocolArm64.Instructions;
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using ChocolArm64.Memory;
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using ChocolArm64.State;
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using System;
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using System.Collections.Generic;
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using System.Reflection;
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using System.Reflection.Emit;
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namespace ChocolArm64.Translation
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{
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class ILEmitterCtx
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{
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public MemoryManager Memory { get; }
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private TranslatorCache _cache;
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private TranslatorQueue _queue;
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private Dictionary<long, ILLabel> _labels;
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private long _subPosition;
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private int _opcIndex;
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private Block _currBlock;
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public Block CurrBlock => _currBlock;
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public OpCode64 CurrOp => _currBlock?.OpCodes[_opcIndex];
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public TranslationTier Tier { get; }
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public Aarch32Mode Mode { get; } = Aarch32Mode.User; //TODO
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public bool HasIndirectJump { get; set; }
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public bool HasSlowCall { get; set; }
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private Dictionary<Block, ILBlock> _visitedBlocks;
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private Queue<Block> _branchTargets;
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private List<ILBlock> _ilBlocks;
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private ILBlock _ilBlock;
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private OpCode64 _optOpLastCompare;
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private OpCode64 _optOpLastFlagSet;
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//This is the index of the temporary register, used to store temporary
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//values needed by some functions, since IL doesn't have a swap instruction.
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//You can use any value here as long it doesn't conflict with the indices
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//for the other registers. Any value >= 64 or < 0 will do.
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private const int ReservedLocalsCount = 64;
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private const int RorTmpIndex = ReservedLocalsCount + 0;
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private const int CmpOptTmp1Index = ReservedLocalsCount + 1;
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private const int CmpOptTmp2Index = ReservedLocalsCount + 2;
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private const int IntGpTmp1Index = ReservedLocalsCount + 3;
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private const int IntGpTmp2Index = ReservedLocalsCount + 4;
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private const int UserIntTempStart = ReservedLocalsCount + 5;
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//Vectors are part of another "set" of locals.
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private const int VecGpTmp1Index = ReservedLocalsCount + 0;
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private const int VecGpTmp2Index = ReservedLocalsCount + 1;
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private const int UserVecTempStart = ReservedLocalsCount + 2;
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private static int _userIntTempCount;
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private static int _userVecTempCount;
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public ILEmitterCtx(
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MemoryManager memory,
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TranslatorCache cache,
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TranslatorQueue queue,
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TranslationTier tier,
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Block graph)
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{
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Memory = memory ?? throw new ArgumentNullException(nameof(memory));
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_cache = cache ?? throw new ArgumentNullException(nameof(cache));
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_queue = queue ?? throw new ArgumentNullException(nameof(queue));
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_currBlock = graph ?? throw new ArgumentNullException(nameof(graph));
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Tier = tier;
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_labels = new Dictionary<long, ILLabel>();
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_visitedBlocks = new Dictionary<Block, ILBlock>();
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_visitedBlocks.Add(graph, new ILBlock());
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_branchTargets = new Queue<Block>();
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_ilBlocks = new List<ILBlock>();
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_subPosition = graph.Position;
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ResetBlockState();
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if (AdvanceOpCode())
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{
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EmitSynchronization();
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_ilBlock.Add(new ILOpCodeLoadState(_ilBlock, isSubEntry: true));
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}
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}
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public static int GetIntTempIndex()
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{
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return UserIntTempStart + _userIntTempCount++;
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}
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public static int GetVecTempIndex()
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{
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return UserVecTempStart + _userVecTempCount++;
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}
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public ILBlock[] GetILBlocks()
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{
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EmitAllOpCodes();
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return _ilBlocks.ToArray();
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}
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private void EmitAllOpCodes()
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{
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do
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{
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EmitOpCode();
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}
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while (AdvanceOpCode());
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}
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private void EmitOpCode()
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{
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if (_currBlock == null)
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{
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return;
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}
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int opcIndex = _opcIndex;
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if (opcIndex == 0)
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{
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MarkLabel(GetLabel(_currBlock.Position));
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}
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bool isLastOp = opcIndex == CurrBlock.OpCodes.Count - 1;
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if (isLastOp && CurrBlock.Branch != null &&
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(ulong)CurrBlock.Branch.Position <= (ulong)CurrBlock.Position)
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{
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EmitSynchronization();
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}
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//On AARCH32 mode, (almost) all instruction can be conditionally
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//executed, and the required condition is encoded on the opcode.
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//We handle that here, skipping the instruction if the condition
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//is not met. We can just ignore it when the condition is "Always",
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//because in this case the instruction is always going to be executed.
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//Condition "Never" is also ignored because this is a special encoding
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//used by some unconditional instructions.
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ILLabel lblSkip = null;
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if (CurrOp is OpCode32 op && op.Cond < Condition.Al)
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{
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lblSkip = new ILLabel();
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EmitCondBranch(lblSkip, GetInverseCond(op.Cond));
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}
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CurrOp.Emitter(this);
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if (lblSkip != null)
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{
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MarkLabel(lblSkip);
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//If this is the last op on the block, and there's no "next" block
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//after this one, then we have to return right now, with the address
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//of the next instruction to be executed (in the case that the condition
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//is false, and the branch was not taken, as all basic blocks should end with
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//some kind of branch).
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if (isLastOp && CurrBlock.Next == null)
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{
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EmitStoreState();
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EmitLdc_I8(CurrOp.Position + CurrOp.OpCodeSizeInBytes);
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Emit(OpCodes.Ret);
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}
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}
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_ilBlock.Add(new ILBarrier());
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}
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private static Condition GetInverseCond(Condition cond)
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{
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//Bit 0 of all conditions is basically a negation bit, so
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//inverting this bit has the effect of inverting the condition.
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return (Condition)((int)cond ^ 1);
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}
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private void EmitSynchronization()
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{
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EmitLdarg(TranslatedSub.StateArgIdx);
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EmitLdc_I4(_currBlock.OpCodes.Count);
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EmitPrivateCall(typeof(CpuThreadState), nameof(CpuThreadState.Synchronize));
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EmitLdc_I4(0);
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ILLabel lblContinue = new ILLabel();
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Emit(OpCodes.Bne_Un_S, lblContinue);
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EmitLdc_I8(0);
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Emit(OpCodes.Ret);
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MarkLabel(lblContinue);
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}
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private bool AdvanceOpCode()
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{
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if (_currBlock == null)
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{
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return false;
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}
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while (++_opcIndex >= _currBlock.OpCodes.Count)
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{
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if (!AdvanceBlock())
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{
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return false;
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}
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ResetBlockState();
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}
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return true;
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}
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private bool AdvanceBlock()
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{
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if (_currBlock.Branch != null)
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{
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if (_visitedBlocks.TryAdd(_currBlock.Branch, _ilBlock.Branch))
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{
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_branchTargets.Enqueue(_currBlock.Branch);
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}
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}
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if (_currBlock.Next != null)
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{
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if (_visitedBlocks.TryAdd(_currBlock.Next, _ilBlock.Next))
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{
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_currBlock = _currBlock.Next;
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return true;
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}
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else
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{
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Emit(OpCodes.Br, GetLabel(_currBlock.Next.Position));
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}
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}
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return _branchTargets.TryDequeue(out _currBlock);
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}
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private void ResetBlockState()
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{
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_ilBlock = _visitedBlocks[_currBlock];
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_ilBlocks.Add(_ilBlock);
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_ilBlock.Next = GetOrCreateILBlock(_currBlock.Next);
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_ilBlock.Branch = GetOrCreateILBlock(_currBlock.Branch);
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_opcIndex = -1;
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_optOpLastFlagSet = null;
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_optOpLastCompare = null;
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}
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private ILBlock GetOrCreateILBlock(Block block)
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{
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if (block == null)
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{
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return null;
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}
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if (_visitedBlocks.TryGetValue(block, out ILBlock ilBlock))
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{
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return ilBlock;
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}
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return new ILBlock();
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}
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public void TranslateAhead(long position, ExecutionMode mode = ExecutionMode.Aarch64)
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{
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if (_cache.TryGetSubroutine(position, out TranslatedSub sub) && sub.Tier != TranslationTier.Tier0)
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{
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return;
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}
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_queue.Enqueue(position, mode, TranslationTier.Tier1, isComplete: true);
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}
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public bool TryOptEmitSubroutineCall()
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{
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//Calls should always have a next block, unless
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//we're translating a single basic block.
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if (_currBlock.Next == null)
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{
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return false;
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}
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if (!(CurrOp is IOpCodeBImm op))
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{
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return false;
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}
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if (!_cache.TryGetSubroutine(op.Imm, out TranslatedSub sub))
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{
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return false;
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}
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//It's not worth to call a Tier0 method, because
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//it contains slow code, rather than the entire function.
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if (sub.Tier == TranslationTier.Tier0)
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{
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return false;
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}
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EmitStoreState(sub);
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for (int index = 0; index < TranslatedSub.FixedArgTypes.Length; index++)
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{
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EmitLdarg(index);
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}
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EmitCall(sub.Method);
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return true;
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}
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public void TryOptMarkCondWithoutCmp()
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{
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_optOpLastCompare = CurrOp;
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InstEmitAluHelper.EmitAluLoadOpers(this);
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Stloc(CmpOptTmp2Index, VarType.Int);
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Stloc(CmpOptTmp1Index, VarType.Int);
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}
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private Dictionary<Condition, OpCode> _branchOps = new Dictionary<Condition, OpCode>()
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{
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{ Condition.Eq, OpCodes.Beq },
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{ Condition.Ne, OpCodes.Bne_Un },
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{ Condition.GeUn, OpCodes.Bge_Un },
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{ Condition.LtUn, OpCodes.Blt_Un },
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{ Condition.GtUn, OpCodes.Bgt_Un },
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{ Condition.LeUn, OpCodes.Ble_Un },
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{ Condition.Ge, OpCodes.Bge },
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{ Condition.Lt, OpCodes.Blt },
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{ Condition.Gt, OpCodes.Bgt },
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{ Condition.Le, OpCodes.Ble }
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};
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public void EmitCondBranch(ILLabel target, Condition cond)
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{
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if (_optOpLastCompare != null &&
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_optOpLastCompare == _optOpLastFlagSet && _branchOps.ContainsKey(cond))
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{
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if (_optOpLastCompare.Emitter == InstEmit.Subs)
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{
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Ldloc(CmpOptTmp1Index, VarType.Int, _optOpLastCompare.RegisterSize);
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Ldloc(CmpOptTmp2Index, VarType.Int, _optOpLastCompare.RegisterSize);
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Emit(_branchOps[cond], target);
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return;
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}
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else if (_optOpLastCompare.Emitter == InstEmit.Adds && cond != Condition.GeUn
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&& cond != Condition.LtUn
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&& cond != Condition.GtUn
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&& cond != Condition.LeUn)
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{
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//There are several limitations that needs to be taken into account for CMN comparisons:
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//* The unsigned comparisons are not valid, as they depend on the
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//carry flag value, and they will have different values for addition and
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//subtraction. For addition, it's carry, and for subtraction, it's borrow.
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//So, we need to make sure we're not doing a unsigned compare for the CMN case.
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//* We can only do the optimization for the immediate variants,
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//because when the second operand value is exactly INT_MIN, we can't
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//negate the value as theres no positive counterpart.
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//Such invalid values can't be encoded on the immediate encodings.
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if (_optOpLastCompare is IOpCodeAluImm64 op)
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{
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Ldloc(CmpOptTmp1Index, VarType.Int, _optOpLastCompare.RegisterSize);
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if (_optOpLastCompare.RegisterSize == RegisterSize.Int32)
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{
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EmitLdc_I4((int)-op.Imm);
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}
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else
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{
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EmitLdc_I8(-op.Imm);
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}
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Emit(_branchOps[cond], target);
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return;
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}
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}
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}
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OpCode ilOp;
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int intCond = (int)cond;
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if (intCond < 14)
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{
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int condTrue = intCond >> 1;
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switch (condTrue)
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{
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case 0: EmitLdflg((int)PState.ZBit); break;
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case 1: EmitLdflg((int)PState.CBit); break;
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case 2: EmitLdflg((int)PState.NBit); break;
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case 3: EmitLdflg((int)PState.VBit); break;
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case 4:
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EmitLdflg((int)PState.CBit);
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EmitLdflg((int)PState.ZBit);
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Emit(OpCodes.Not);
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Emit(OpCodes.And);
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break;
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case 5:
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case 6:
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EmitLdflg((int)PState.NBit);
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EmitLdflg((int)PState.VBit);
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Emit(OpCodes.Ceq);
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if (condTrue == 6)
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{
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EmitLdflg((int)PState.ZBit);
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Emit(OpCodes.Not);
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Emit(OpCodes.And);
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}
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break;
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}
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ilOp = (intCond & 1) != 0
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? OpCodes.Brfalse
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: OpCodes.Brtrue;
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}
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else
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{
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ilOp = OpCodes.Br;
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}
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Emit(ilOp, target);
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}
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public void EmitCast(IntType intType)
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{
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switch (intType)
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{
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case IntType.UInt8: Emit(OpCodes.Conv_U1); break;
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case IntType.UInt16: Emit(OpCodes.Conv_U2); break;
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case IntType.UInt32: Emit(OpCodes.Conv_U4); break;
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case IntType.UInt64: Emit(OpCodes.Conv_U8); break;
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case IntType.Int8: Emit(OpCodes.Conv_I1); break;
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case IntType.Int16: Emit(OpCodes.Conv_I2); break;
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case IntType.Int32: Emit(OpCodes.Conv_I4); break;
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case IntType.Int64: Emit(OpCodes.Conv_I8); break;
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}
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bool sz64 = CurrOp.RegisterSize != RegisterSize.Int32;
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if (sz64 == (intType == IntType.UInt64 ||
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intType == IntType.Int64))
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{
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return;
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}
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if (sz64)
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{
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Emit(intType >= IntType.Int8
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? OpCodes.Conv_I8
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: OpCodes.Conv_U8);
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}
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else
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{
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Emit(OpCodes.Conv_U4);
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}
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}
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public void EmitLsl(int amount) => EmitILShift(amount, OpCodes.Shl);
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public void EmitLsr(int amount) => EmitILShift(amount, OpCodes.Shr_Un);
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public void EmitAsr(int amount) => EmitILShift(amount, OpCodes.Shr);
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private void EmitILShift(int amount, OpCode ilOp)
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{
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if (amount > 0)
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{
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EmitLdc_I4(amount);
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Emit(ilOp);
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}
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}
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public void EmitRor(int amount)
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{
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if (amount > 0)
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{
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Stloc(RorTmpIndex, VarType.Int);
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Ldloc(RorTmpIndex, VarType.Int);
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EmitLdc_I4(amount);
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Emit(OpCodes.Shr_Un);
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Ldloc(RorTmpIndex, VarType.Int);
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EmitLdc_I4(CurrOp.GetBitsCount() - amount);
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Emit(OpCodes.Shl);
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Emit(OpCodes.Or);
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}
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}
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public ILLabel GetLabel(long position)
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{
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if (!_labels.TryGetValue(position, out ILLabel output))
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{
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output = new ILLabel();
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_labels.Add(position, output);
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}
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return output;
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}
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public void MarkLabel(ILLabel label)
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{
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_ilBlock.Add(label);
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}
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public void Emit(OpCode ilOp)
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{
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_ilBlock.Add(new ILOpCode(ilOp));
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}
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public void Emit(OpCode ilOp, ILLabel label)
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{
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_ilBlock.Add(new ILOpCodeBranch(ilOp, label));
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}
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public void EmitFieldLoad(FieldInfo info)
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{
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_ilBlock.Add(new ILOpCodeLoadField(info));
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}
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public void EmitPrint(string text)
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{
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_ilBlock.Add(new ILOpCodeLog(text));
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}
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public void EmitLdarg(int index)
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{
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_ilBlock.Add(new ILOpCodeLoad(index, VarType.Arg));
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}
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public void EmitLdintzr(int index)
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|
{
|
|
if (index != RegisterAlias.Zr)
|
|
{
|
|
EmitLdint(index);
|
|
}
|
|
else
|
|
{
|
|
EmitLdc_I(0);
|
|
}
|
|
}
|
|
|
|
public void EmitStintzr(int index)
|
|
{
|
|
if (index != RegisterAlias.Zr)
|
|
{
|
|
EmitStint(index);
|
|
}
|
|
else
|
|
{
|
|
Emit(OpCodes.Pop);
|
|
}
|
|
}
|
|
|
|
public void EmitLoadState()
|
|
{
|
|
if (_ilBlock.Next == null)
|
|
{
|
|
throw new InvalidOperationException("Can't load state for next block, because there's no next block.");
|
|
}
|
|
|
|
_ilBlock.Add(new ILOpCodeLoadState(_ilBlock.Next));
|
|
}
|
|
|
|
public void EmitStoreState()
|
|
{
|
|
_ilBlock.Add(new ILOpCodeStoreState(_ilBlock));
|
|
}
|
|
|
|
private void EmitStoreState(TranslatedSub callSub)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeStoreState(_ilBlock, callSub));
|
|
}
|
|
|
|
public void EmitLdtmp() => EmitLdint(IntGpTmp1Index);
|
|
public void EmitSttmp() => EmitStint(IntGpTmp1Index);
|
|
|
|
public void EmitLdtmp2() => EmitLdint(IntGpTmp2Index);
|
|
public void EmitSttmp2() => EmitStint(IntGpTmp2Index);
|
|
|
|
public void EmitLdvectmp() => EmitLdvec(VecGpTmp1Index);
|
|
public void EmitStvectmp() => EmitStvec(VecGpTmp1Index);
|
|
|
|
public void EmitLdvectmp2() => EmitLdvec(VecGpTmp2Index);
|
|
public void EmitStvectmp2() => EmitStvec(VecGpTmp2Index);
|
|
|
|
public void EmitLdint(int index) => Ldloc(index, VarType.Int);
|
|
public void EmitStint(int index) => Stloc(index, VarType.Int);
|
|
|
|
public void EmitLdvec(int index) => Ldloc(index, VarType.Vector);
|
|
public void EmitStvec(int index) => Stloc(index, VarType.Vector);
|
|
|
|
public void EmitLdflg(int index) => Ldloc(index, VarType.Flag);
|
|
public void EmitStflg(int index)
|
|
{
|
|
//Set this only if any of the NZCV flag bits were modified.
|
|
//This is used to ensure that, when emiting a direct IL branch
|
|
//instruction for compare + branch sequences, we're not expecting
|
|
//to use comparison values from an old instruction, when in fact
|
|
//the flags were already overwritten by another instruction further along.
|
|
if (index >= (int)PState.VBit)
|
|
{
|
|
_optOpLastFlagSet = CurrOp;
|
|
}
|
|
|
|
Stloc(index, VarType.Flag);
|
|
}
|
|
|
|
private void Ldloc(int index, VarType varType)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeLoad(index, varType, CurrOp.RegisterSize));
|
|
}
|
|
|
|
private void Ldloc(int index, VarType varType, RegisterSize registerSize)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeLoad(index, varType, registerSize));
|
|
}
|
|
|
|
private void Stloc(int index, VarType varType)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeStore(index, varType, CurrOp.RegisterSize));
|
|
}
|
|
|
|
public void EmitCallPropGet(Type objType, string propName)
|
|
{
|
|
EmitCall(objType, $"get_{propName}");
|
|
}
|
|
|
|
public void EmitCallPropSet(Type objType, string propName)
|
|
{
|
|
EmitCall(objType, $"set_{propName}");
|
|
}
|
|
|
|
public void EmitCall(Type objType, string mthdName)
|
|
{
|
|
if (objType == null)
|
|
{
|
|
throw new ArgumentNullException(nameof(objType));
|
|
}
|
|
|
|
if (mthdName == null)
|
|
{
|
|
throw new ArgumentNullException(nameof(mthdName));
|
|
}
|
|
|
|
EmitCall(objType.GetMethod(mthdName));
|
|
}
|
|
|
|
public void EmitCallPrivatePropGet(Type objType, string propName)
|
|
{
|
|
EmitPrivateCall(objType, $"get_{propName}");
|
|
}
|
|
|
|
public void EmitCallPrivatePropSet(Type objType, string propName)
|
|
{
|
|
EmitPrivateCall(objType, $"set_{propName}");
|
|
}
|
|
|
|
public void EmitPrivateCall(Type objType, string mthdName)
|
|
{
|
|
if (objType == null)
|
|
{
|
|
throw new ArgumentNullException(nameof(objType));
|
|
}
|
|
|
|
if (mthdName == null)
|
|
{
|
|
throw new ArgumentNullException(nameof(mthdName));
|
|
}
|
|
|
|
EmitCall(objType.GetMethod(mthdName, BindingFlags.Instance | BindingFlags.NonPublic));
|
|
}
|
|
|
|
public void EmitCall(MethodInfo mthdInfo, bool isVirtual = false)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeCall(mthdInfo ?? throw new ArgumentNullException(nameof(mthdInfo)), isVirtual));
|
|
}
|
|
|
|
public void EmitLdc_I(long value)
|
|
{
|
|
if (CurrOp.RegisterSize == RegisterSize.Int32)
|
|
{
|
|
EmitLdc_I4((int)value);
|
|
}
|
|
else
|
|
{
|
|
EmitLdc_I8(value);
|
|
}
|
|
}
|
|
|
|
public void EmitLdc_I4(int value)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeConst(value));
|
|
}
|
|
|
|
public void EmitLdc_I8(long value)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeConst(value));
|
|
}
|
|
|
|
public void EmitLdc_R4(float value)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeConst(value));
|
|
}
|
|
|
|
public void EmitLdc_R8(double value)
|
|
{
|
|
_ilBlock.Add(new ILOpCodeConst(value));
|
|
}
|
|
|
|
public void EmitZnFlagCheck()
|
|
{
|
|
EmitZnCheck(OpCodes.Ceq, (int)PState.ZBit);
|
|
EmitZnCheck(OpCodes.Clt, (int)PState.NBit);
|
|
}
|
|
|
|
private void EmitZnCheck(OpCode ilCmpOp, int flag)
|
|
{
|
|
Emit(OpCodes.Dup);
|
|
Emit(OpCodes.Ldc_I4_0);
|
|
|
|
if (CurrOp.RegisterSize != RegisterSize.Int32)
|
|
{
|
|
Emit(OpCodes.Conv_I8);
|
|
}
|
|
|
|
Emit(ilCmpOp);
|
|
|
|
EmitStflg(flag);
|
|
}
|
|
}
|
|
}
|