Polprzewodnikowy 06aa5c9de2 reset vector update

2021-11-16 22:13:56 +01:00

..

cpu_bus.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_cfg.sv

[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)

2021-11-10 02:05:51 +01:00

cpu_dma.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_flash.sv

[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9)

2021-10-26 23:44:09 +02:00

cpu_flashram.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_gpio.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_i2c.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_ram.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_sdram.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_si.sv

[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)

2021-09-25 20:00:36 +02:00

cpu_soc.sv

prioritize joybus, cpu_has_uart flag

2021-11-16 19:43:59 +01:00

cpu_uart.sv

[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)

2021-11-10 02:05:51 +01:00

cpu_usb.sv

[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)

2021-11-10 02:05:51 +01:00

cpu_wrapper.sv

reset vector update

2021-11-16 22:13:56 +01:00