Mateusz Faderewski 24f04ae916 verilator init		2024-07-07 00:09:03 +02:00
..
fifo	[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)	2022-11-10 11:46:54 +01:00
mcu	reset improvement	2024-06-30 17:43:28 +02:00
memory	verilator init	2024-07-07 00:09:03 +02:00
n64	[SC64][FW][SW] Added option to set and read century when updating RTC datetime	2024-06-06 23:00:38 +02:00
sd	[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)	2022-11-10 11:46:54 +01:00
serv	[SC64][FW][SW] Moved CIC emulation from MCU to FPGA (#56)	2023-12-14 19:26:54 +01:00
usb	reset improvement	2024-06-30 17:43:28 +02:00
vendor	[SC64][FW] Set timing constraints for SDRAM pins	2024-05-05 07:08:44 +02:00
top.sv	[SC64][FW] Added placeholder test point outputs in the FPGA project	2024-05-03 17:55:40 +02:00