Polprzewodnikowy da9c3f6aed dum.py rewrite		2021-11-19 00:18:46 +01:00
..
src	dum.py rewrite	2021-11-19 00:18:46 +01:00
.gitignore	[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)	2021-09-25 20:00:36 +02:00
Makefile	slightly optimize sw build	2021-11-18 01:51:43 +00:00
SC64.ld	[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12)	2021-11-16 22:37:48 +01:00