10 Commits

Author	SHA1	Message	Date
Polprzewodnikowy	da9c3f6aed	dum.py rewrite	2021-11-19 00:18:46 +01:00
Mateusz Faderewski	19c34a861b	slightly optimize sw build	2021-11-18 01:51:43 +00:00
Mateusz Faderewski	29aca8aea6	[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12)	2021-11-16 22:37:48 +01:00
Mateusz Faderewski	8485face13	[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)	2021-11-10 02:05:51 +01:00
Mateusz Faderewski	d1bf99fdf4	[SC64][FW][SW] Added command to reconfigure FPGA from software (#10)	2021-10-29 00:19:17 +02:00
Mateusz Faderewski	adff845460	[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9)	2021-10-26 23:44:09 +02:00
Mateusz Faderewski	c02494855e	[SC64][SW] Added USB debug feature (#8)	2021-10-23 21:55:52 +02:00
Mateusz Faderewski	ec1fbf3ec1	[SC64][CI/CD] Moved docker build environment to another repository (#7)	2021-09-26 14:42:50 +02:00
Mateusz Faderewski	7207d1a528	[SC64][CI/CD] Update build action/scripts (#6)	2021-09-25 23:46:53 +02:00
Mateusz Faderewski	45fbd53001	[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)	2021-09-25 20:00:36 +02:00