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Core/DSPCore: Changed g_dsp._r back to g_dsp.r. Removed the check*Exclude

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functions accidentally added. Fixed the jitted ar register arithmetic.
Added a CMakeList.txt for the UnitTests, but did not add the subdirectory
to Source/CMakeLists.txt.


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6687 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
pierre
2010-12-29 20:20:52 +00:00
parent 765fb4bbe3
commit 98752f2a1e
23 changed files with 886 additions and 782 deletions
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52
Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
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@ -28,128 +28,128 @@ namespace DSPInterpreter {
void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
{
g_dsp._r.sr &= ~SR_CMP_MASK;
g_dsp.r.sr &= ~SR_CMP_MASK;
// 0x01
if (carry)
{
g_dsp._r.sr |= SR_CARRY;
g_dsp.r.sr |= SR_CARRY;
}
// 0x02 and 0x80
if (overflow)
{
g_dsp._r.sr |= SR_OVERFLOW;
g_dsp._r.sr |= SR_OVERFLOW_STICKY;
g_dsp.r.sr |= SR_OVERFLOW;
g_dsp.r.sr |= SR_OVERFLOW_STICKY;
}
// 0x04
if (_Value == 0)
{
g_dsp._r.sr |= SR_ARITH_ZERO;
g_dsp.r.sr |= SR_ARITH_ZERO;
}
// 0x08
if (_Value < 0)
{
g_dsp._r.sr |= SR_SIGN;
g_dsp.r.sr |= SR_SIGN;
}
// 0x10
if (_Value != (s32)_Value)
{
g_dsp._r.sr |= SR_OVER_S32;
g_dsp.r.sr |= SR_OVER_S32;
}
// 0x20 - Checks if top bits of m are equal
if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000))
{
g_dsp._r.sr |= SR_TOP2BITS;
g_dsp.r.sr |= SR_TOP2BITS;
}
}
void Update_SR_Register16(s16 _Value, bool carry, bool overflow, bool overS32)
{
g_dsp._r.sr &= ~SR_CMP_MASK;
g_dsp.r.sr &= ~SR_CMP_MASK;
// 0x01
if (carry)
{
g_dsp._r.sr |= SR_CARRY;
g_dsp.r.sr |= SR_CARRY;
}
// 0x02 and 0x80
if (overflow)
{
g_dsp._r.sr |= SR_OVERFLOW;
g_dsp._r.sr |= SR_OVERFLOW_STICKY;
g_dsp.r.sr |= SR_OVERFLOW;
g_dsp.r.sr |= SR_OVERFLOW_STICKY;
}
// 0x04
if (_Value == 0)
{
g_dsp._r.sr |= SR_ARITH_ZERO;
g_dsp.r.sr |= SR_ARITH_ZERO;
}
// 0x08
if (_Value < 0)
{
g_dsp._r.sr |= SR_SIGN;
g_dsp.r.sr |= SR_SIGN;
}
// 0x10
if (overS32)
{
g_dsp._r.sr |= SR_OVER_S32;
g_dsp.r.sr |= SR_OVER_S32;
}
// 0x20 - Checks if top bits of m are equal
if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3))
{
g_dsp._r.sr |= SR_TOP2BITS;
g_dsp.r.sr |= SR_TOP2BITS;
}
}
void Update_SR_LZ(bool value)
{
if (value == true)
g_dsp._r.sr |= SR_LOGIC_ZERO;
g_dsp.r.sr |= SR_LOGIC_ZERO;
else
g_dsp._r.sr &= ~SR_LOGIC_ZERO;
g_dsp.r.sr &= ~SR_LOGIC_ZERO;
}
inline int GetMultiplyModifier()
{
return (g_dsp._r.sr & SR_MUL_MODIFY)?1:2;
return (g_dsp.r.sr & SR_MUL_MODIFY)?1:2;
}
inline bool isCarry() {
return (g_dsp._r.sr & SR_CARRY) ? true : false;
return (g_dsp.r.sr & SR_CARRY) ? true : false;
}
inline bool isOverflow() {
return (g_dsp._r.sr & SR_OVERFLOW) ? true : false;
return (g_dsp.r.sr & SR_OVERFLOW) ? true : false;
}
inline bool isOverS32() {
return (g_dsp._r.sr & SR_OVER_S32) ? true : false;
return (g_dsp.r.sr & SR_OVER_S32) ? true : false;
}
inline bool isLess() {
return (!(g_dsp._r.sr & SR_OVERFLOW) != !(g_dsp._r.sr & SR_SIGN));
return (!(g_dsp.r.sr & SR_OVERFLOW) != !(g_dsp.r.sr & SR_SIGN));
}
inline bool isZero() {
return (g_dsp._r.sr & SR_ARITH_ZERO) ? true : false;
return (g_dsp.r.sr & SR_ARITH_ZERO) ? true : false;
}
inline bool isLogicZero() {
return (g_dsp._r.sr & SR_LOGIC_ZERO) ? true : false;
return (g_dsp.r.sr & SR_LOGIC_ZERO) ? true : false;
}
inline bool isConditionA() {
return (((g_dsp._r.sr & SR_OVER_S32) || (g_dsp._r.sr & SR_TOP2BITS)) && !(g_dsp._r.sr & SR_ARITH_ZERO)) ? true : false;
return (((g_dsp.r.sr & SR_OVER_S32) || (g_dsp.r.sr & SR_TOP2BITS)) && !(g_dsp.r.sr & SR_ARITH_ZERO)) ? true : false;
}
//see DSPCore.h for flags