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DSPLLE: Small fixes for zeroing flags

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4020 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee
2009-08-20 13:49:30 +00:00
parent 56c4eea4c1
commit fdc141e333
2 changed files with 16 additions and 11 deletions
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25
Source/Core/DSPCore/Src/DspIntArithmetic.cpp
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@ -144,10 +144,11 @@ void xorr(const UDSPInstruction& opc)
{
u8 sreg = (opc.hex >> 9) & 0x1;
u8 dreg = (opc.hex >> 8) & 0x1;
u16 axh = g_dsp.r[DSP_REG_AXH0 + sreg];
zeroWriteBackLog();
g_dsp.r[DSP_REG_ACM0 + dreg] ^= g_dsp.r[DSP_REG_AXH0 + sreg];
g_dsp.r[DSP_REG_ACM0 + dreg] ^= axh;
s64 acc = dsp_get_long_acc(dreg);
Update_SR_Register64(acc);
@ -161,10 +162,11 @@ void andr(const UDSPInstruction& opc)
{
u8 sreg = (opc.hex >> 9) & 0x1;
u8 dreg = (opc.hex >> 8) & 0x1;
u16 axh = g_dsp.r[DSP_REG_AXH0 + sreg];
zeroWriteBackLog();
g_dsp.r[DSP_REG_ACM0 + dreg] &= g_dsp.r[DSP_REG_AXH0 + sreg];
g_dsp.r[DSP_REG_ACM0 + dreg] &= axh;
s64 acc = dsp_get_long_acc(dreg);
Update_SR_Register64(acc);
@ -178,10 +180,11 @@ void orr(const UDSPInstruction& opc)
{
u8 sreg = (opc.hex >> 9) & 0x1;
u8 dreg = (opc.hex >> 8) & 0x1;
u16 axh = g_dsp.r[DSP_REG_AXH0 + sreg];
zeroWriteBackLog();
g_dsp.r[DSP_REG_ACM0 + dreg] |= g_dsp.r[DSP_REG_AXH0 + sreg];
g_dsp.r[DSP_REG_ACM0 + dreg] |= axh;
s64 acc = dsp_get_long_acc(dreg);
Update_SR_Register64(acc);
@ -195,10 +198,11 @@ void orr(const UDSPInstruction& opc)
void andc(const UDSPInstruction& opc)
{
u8 D = (opc.hex >> 8) & 0x1;
u16 accm = dsp_get_acc_m(1-D);
zeroWriteBackLog();
g_dsp.r[DSP_REG_ACM0+D] &= dsp_get_acc_m(1-D);
g_dsp.r[DSP_REG_ACM0+D] &= accm;
Update_SR_Register16(dsp_get_acc_m(D));
}
@ -211,10 +215,11 @@ void andc(const UDSPInstruction& opc)
void orc(const UDSPInstruction& opc)
{
u8 D = (opc.hex >> 8) & 0x1;
u16 accm = dsp_get_acc_m(1-D);
zeroWriteBackLog();
g_dsp.r[DSP_REG_ACM0+D] |= dsp_get_acc_m(1-D);
g_dsp.r[DSP_REG_ACM0+D] |= accm;
Update_SR_Register16(dsp_get_acc_m(D));
}