Léo Lam b9f7d67667 IPC: Fix missing interrupt when writing to Y1/Y2
The IPC interrupt is triggered when IY1/IY2 is set and Y1/Y2 is written
to even when this results in clearing the bit.

This shouldn't change anything in practice but it's a difference
that Dolphin wasn't taking into account, which made me waste some time
when I was writing a hwtest :/
2018-03-16 18:51:08 +01:00
..
2017-09-13 17:38:23 +02:00
2017-06-27 00:06:14 -07:00
2017-09-27 16:06:15 -07:00