mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-02-10 22:49:00 +01:00
![Léo Lam](/assets/img/avatar_default.png)
The IPC interrupt is triggered when IY1/IY2 is set and Y1/Y2 is written to even when this results in clearing the bit. This shouldn't change anything in practice but it's a difference that Dolphin wasn't taking into account, which made me waste some time when I was writing a hwtest :/