The-Homebrew-Cloud/fbzx-wii
2
0
Fork 0
mirror of https://github.com/Oibaf66/fbzx-wii.git synced 2024-11-28 11:04:15 +01:00
Code Issues Packages Projects Releases Wiki Activity

Fixed OTI in gencode

Browse Source
This commit is contained in:
fabio.olimpieri 2012-05-20 14:21:29 +00:00
parent e5dda6bb45
commit 89e9f9bc03
2 changed files with 1309 additions and 1309 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/z80free/Z80free_codesED.c
View File

@ -631,7 +631,7 @@ int Z80free_codesED (Z80FREE *processor,byte opcode) {
return (12); return (12);
break; break;
case 163: // OUTI case 163: // OUTI
/*OUTI, OUTD, OTIR and OTDR first uses B and then decrement it*/ /*OUTI, OUTD, OTIR and OTDR first decrements B and then uses it*/
processor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1); processor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);
Z80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL)); Z80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));
processor->Rm.wr.HL++; processor->Rm.wr.HL++;

10
src/z80free/z80free_gencode.py
View File

@ -838,10 +838,10 @@ class z80_parser(generic_parser):
return False return False
if opcode=="OUTI": if opcode=="OUTI":
self.file_out.write("\t\t/*OUTI, OUTD, OTIR and OTDR first uses B and then decrement it*/\n") self.file_out.write("\t\t/*OUTI, OUTD, OTIR and OTDR first decrements B and then uses it*/\n")
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n") self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n")
self.file_out.write("\t\tprocessor->Rm.wr.HL++;\n") self.file_out.write("\t\tprocessor->Rm.wr.HL++;\n")
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
return False return False
if opcode=="LDD": if opcode=="LDD":
@ -881,9 +881,9 @@ class z80_parser(generic_parser):
return False return False
if opcode=="OUTD": if opcode=="OUTD":
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n") self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n")
self.file_out.write("\t\tprocessor->Rm.wr.HL--;\n") self.file_out.write("\t\tprocessor->Rm.wr.HL--;\n")
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
return False return False
if opcode=="LDIR": if opcode=="LDIR":
@ -929,9 +929,9 @@ class z80_parser(generic_parser):
return True return True
if opcode=="OTIR": if opcode=="OTIR":
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n") self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n")
self.file_out.write("\t\tprocessor->Rm.wr.HL++;\n") self.file_out.write("\t\tprocessor->Rm.wr.HL++;\n")
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tif (processor->Rm.br.B) {\n") self.file_out.write("\t\tif (processor->Rm.br.B) {\n")
self.file_out.write("\t\t\tprocessor->PC-=2;\n") self.file_out.write("\t\t\tprocessor->PC-=2;\n")
self.file_out.write("\t\t\treturn ("+str(tst1)+");\n") self.file_out.write("\t\t\treturn ("+str(tst1)+");\n")
@ -983,9 +983,9 @@ class z80_parser(generic_parser):
return True return True
if opcode=="OTDR": if opcode=="OTDR":
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n") self.file_out.write("\t\tZ80free_Out(processor->Rm.wr.BC,Z80free_Rd(processor->Rm.wr.HL));\n")
self.file_out.write("\t\tprocessor->Rm.wr.HL--;\n") self.file_out.write("\t\tprocessor->Rm.wr.HL--;\n")
self.file_out.write("\t\tprocessor->Rm.br.B=Z80free_doIncDec(processor,processor->Rm.br.B,1);\n")
self.file_out.write("\t\tif (processor->Rm.br.B) {\n") self.file_out.write("\t\tif (processor->Rm.br.B) {\n")
self.file_out.write("\t\t\tprocessor->PC-=2;\n") self.file_out.write("\t\t\tprocessor->PC-=2;\n")
self.file_out.write("\t\t\treturn ("+str(tst1)+");\n") self.file_out.write("\t\t\treturn ("+str(tst1)+");\n")