2008-12-28 14:35:37 +01:00
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#ifndef __MEMORY_H__
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#define __MEMORY_H__
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#include "types.h"
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#define ALIGN_FORWARD(x,align) \
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((typeof(x))((((u32)(x)) + (align) - 1) & (~(align-1))))
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#define ALIGN_BACKWARD(x,align) \
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((typeof(x))(((u32)(x)) & (~(align-1))))
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enum AHBDEV {
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MEMORY = 0,
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RAW0 = 0x100,
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RAWF = 0x10F,
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};
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2009-01-16 09:07:33 +01:00
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void dc_flushrange(const void *start, u32 size);
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2008-12-28 14:35:37 +01:00
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void dc_invalidaterange(void *start, u32 size);
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void dc_flushall(void);
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void ic_invalidateall(void);
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void magic_bullshit(int type);
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void ahb_memflush(enum AHBDEV dev);
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void mem_protect(int enable, void *start, void *end);
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void mem_setswap(int enable);
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2009-01-16 08:53:03 +01:00
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void mem_initialize(void);
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void mem_shutdown(void);
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static inline u32 get_cr(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c1, c0, 0" : "=r" (data) );
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return data;
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}
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static inline u32 get_ttbr(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c2, c0, 0" : "=r" (data) );
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return data;
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}
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static inline u32 get_dacr(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c3, c0, 0" : "=r" (data) );
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return data;
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}
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static inline void set_cr(u32 data)
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{
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__asm__ volatile ( "mcr\tp15, 0, %0, c1, c0, 0" :: "r" (data) );
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}
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static inline void set_ttbr(u32 data)
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{
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__asm__ volatile ( "mcr\tp15, 0, %0, c2, c0, 0" :: "r" (data) );
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}
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static inline void set_dacr(u32 data)
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{
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__asm__ volatile ( "mcr\tp15, 0, %0, c3, c0, 0" :: "r" (data) );
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}
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static inline u32 get_dfsr(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c5, c0, 0" : "=r" (data) );
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return data;
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}
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static inline u32 get_ifsr(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c5, c0, 1" : "=r" (data) );
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return data;
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}
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static inline u32 get_far(void)
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{
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u32 data;
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__asm__ volatile ( "mrc\tp15, 0, %0, c6, c0, 0" : "=r" (data) );
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return data;
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}
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2008-12-28 14:35:37 +01:00
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#endif
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