2009-04-10 18:15:10 +02:00
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/*
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mini - a Free Software replacement for the Nintendo/BroadOn IOS.
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system startup
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Copyright (C) 2008, 2009 Hector Martin "marcan" <marcan@marcansoft.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, version 2.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2008-12-28 14:35:37 +01:00
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.arm
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.extern _main
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.extern __got_start
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.extern __got_end
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.extern __bss_start
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.extern __bss_end
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2009-01-08 23:27:22 +01:00
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.extern __bss2_start
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.extern __bss2_end
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2008-12-28 14:35:37 +01:00
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.extern __stack_addr
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.globl _start
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.globl debug_output
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2009-01-08 23:27:22 +01:00
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2009-01-16 08:53:57 +01:00
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.extern v_undf
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.extern v_swi
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.extern v_instr_abrt
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.extern v_data_abrt
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.extern v_reserved
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2009-01-08 23:27:22 +01:00
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.extern v_irq
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2009-01-16 08:53:57 +01:00
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.extern v_fiq
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2008-12-28 14:35:37 +01:00
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.section .init
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2009-01-06 00:13:39 +01:00
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_vectors:
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2008-12-28 14:35:37 +01:00
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_start:
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2009-01-06 00:13:39 +01:00
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ldr pc, =v_reset
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ldr pc, =v_undf
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ldr pc, =v_swi
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ldr pc, =v_instr_abrt
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ldr pc, =v_data_abrt
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ldr pc, =v_reserved
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ldr pc, =v_irq
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ldr pc, =v_fiq
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.pool
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v_reset:
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2009-01-16 08:47:49 +01:00
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@ Switch to System mode
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msr cpsr_c, #0xdf
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2009-01-06 00:13:39 +01:00
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@ Get loader base from ELF loader
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mov r4, r0
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2008-12-28 14:35:37 +01:00
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@ Output 0x42 to the debug port
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mov r0, #0x42
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bl debug_output
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2009-03-26 05:15:05 +01:00
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2008-12-28 14:35:37 +01:00
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@ Set up a stack
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ldr sp, =__stack_addr
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2009-03-26 05:15:05 +01:00
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@ clear the stack to a marker value
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ldr r1, =__stack_end
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ldr r2, =__stack_addr
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ldr r3, =0xDEADBEEF
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stk_loop:
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@ check for the end
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cmp r1, r2
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beq done_stk
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@ clear the word and move on
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str r3, [r1]
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add r1, r1, #4
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b stk_loop
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done_stk:
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2008-12-28 14:35:37 +01:00
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@ clear BSS
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ldr r1, =__bss_start
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ldr r2, =__bss_end
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mov r3, #0
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bss_loop:
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@ check for the end
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cmp r1, r2
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beq done_bss
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@ clear the word and move on
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str r3, [r1]
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add r1, r1, #4
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b bss_loop
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done_bss:
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2009-01-08 23:27:22 +01:00
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@ clear BSS2
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ldr r1, =__bss2_start
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ldr r2, =__bss2_end
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mov r3, #0
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bss2_loop:
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@ check for the end
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cmp r1, r2
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beq done_bss2
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@ clear the word and move on
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str r3, [r1]
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add r1, r1, #4
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b bss2_loop
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done_bss2:
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2009-01-06 00:13:39 +01:00
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mov r0, #0x84
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2008-12-28 14:35:37 +01:00
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bl debug_output
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@ take the plunge
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mov r0, r4
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bl _main
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@ _main returned! Go to whatever address it returned...
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mov pc, r0
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.pool
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debug_output:
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@ load address of port
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mov r3, #0xd800000
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@ load old value
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ldr r2, [r3, #0xe0]
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@ clear debug byte
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bic r2, r2, #0xFF0000
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@ insert new value
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and r0, r0, #0xFF
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orr r2, r2, r0, LSL #16
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@ store back
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str r2, [r3, #0xe0]
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2009-01-08 23:27:22 +01:00
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bx lr
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2008-12-28 14:35:37 +01:00
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2009-01-06 00:13:39 +01:00
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.pool
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2009-04-13 22:13:45 +02:00
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