Move IOVA class to GMMU so it can be used for other engines

This commit is contained in:
Billy Laws 2022-05-13 22:19:59 +01:00
parent 3ad640fcbc
commit be2546138d
2 changed files with 18 additions and 17 deletions

View File

@ -18,6 +18,7 @@
#include "conversion/quads.h" #include "conversion/quads.h"
namespace skyline::gpu::interconnect { namespace skyline::gpu::interconnect {
using IOVA = soc::gm20b::IOVA;
namespace maxwell3d = soc::gm20b::engine::maxwell3d::type; namespace maxwell3d = soc::gm20b::engine::maxwell3d::type;
namespace ShaderCompiler = ::Shader; //!< Namespace alias to avoid conflict with the `Shader` class namespace ShaderCompiler = ::Shader; //!< Namespace alias to avoid conflict with the `Shader` class
@ -31,23 +32,6 @@ namespace skyline::gpu::interconnect {
soc::gm20b::ChannelContext &channelCtx; soc::gm20b::ChannelContext &channelCtx;
gpu::interconnect::CommandExecutor &executor; gpu::interconnect::CommandExecutor &executor;
/**
* @brief A host IOVA address composed of 32-bit low/high register values
* @note This differs from maxwell3d::Address in that it is little-endian rather than big-endian ordered for the register values
*/
union IOVA {
u64 iova;
struct {
u32 low;
u32 high;
};
operator u64 &() {
return iova;
}
};
static_assert(sizeof(IOVA) == sizeof(u64));
public: public:
GraphicsContext(GPU &gpu, soc::gm20b::ChannelContext &channelCtx, gpu::interconnect::CommandExecutor &executor) : gpu(gpu), channelCtx(channelCtx), executor(executor) { GraphicsContext(GPU &gpu, soc::gm20b::ChannelContext &channelCtx, gpu::interconnect::CommandExecutor &executor) : gpu(gpu), channelCtx(channelCtx), executor(executor) {
scissors.fill(DefaultScissor); scissors.fill(DefaultScissor);

View File

@ -18,4 +18,21 @@ namespace skyline::soc::gm20b {
struct AddressSpaceContext { struct AddressSpaceContext {
GMMU gmmu; GMMU gmmu;
}; };
/**
* @brief A host IOVA address composed of 32-bit low/high register values
* @note This differs from engine::Address in that it is little-endian rather than big-endian ordered for the register values
*/
union IOVA {
u64 iova;
struct {
u32 low;
u32 high;
};
operator u64 &() {
return iova;
}
};
static_assert(sizeof(IOVA) == sizeof(u64));
} }