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https://github.com/ekeeke/Genesis-Plus-GX.git
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commit
1a82492968
@ -1094,7 +1094,7 @@ void scd_init(void)
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m68k.memory_map[i].write8 = NULL;
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m68k.memory_map[i].write8 = NULL;
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m68k.memory_map[i].write16 = NULL;
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m68k.memory_map[i].write16 = NULL;
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zbank_memory_map[i].read = NULL;
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zbank_memory_map[i].read = NULL;
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zbank_memory_map[i].write = zbank_unused_w; /* Z80 cannot write to PRG-RAM (Dungeon Explorer USA version) */
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zbank_memory_map[i].write = NULL;
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}
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}
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else
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else
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@ -1479,6 +1479,28 @@ int scd_context_load(uint8 *state)
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m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
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m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
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m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000;
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m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if ((scd.regs[0x00].byte.l & 0x03) != 0x01)
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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m68k.memory_map[scd.cartridge.boot + 0x02].read8 = m68k.memory_map[scd.cartridge.boot + 0x03].read8 = NULL;
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m68k.memory_map[scd.cartridge.boot + 0x02].read16 = m68k.memory_map[scd.cartridge.boot + 0x03].read16 = NULL;
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m68k.memory_map[scd.cartridge.boot + 0x02].write8 = m68k.memory_map[scd.cartridge.boot + 0x03].write8 = NULL;
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m68k.memory_map[scd.cartridge.boot + 0x02].write16 = m68k.memory_map[scd.cartridge.boot + 0x03].write16 = NULL;
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zbank_memory_map[scd.cartridge.boot + 0x02].read = zbank_memory_map[scd.cartridge.boot + 0x03].read = NULL;
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zbank_memory_map[scd.cartridge.boot + 0x02].write = zbank_memory_map[scd.cartridge.boot + 0x03].write = NULL;
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}
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else
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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m68k.memory_map[scd.cartridge.boot + 0x02].read8 = m68k.memory_map[scd.cartridge.boot + 0x03].read8 = m68k_read_bus_8;
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m68k.memory_map[scd.cartridge.boot + 0x02].read16 = m68k.memory_map[scd.cartridge.boot + 0x03].read16 = m68k_read_bus_16;
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m68k.memory_map[scd.cartridge.boot + 0x02].write8 = m68k.memory_map[scd.cartridge.boot + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[scd.cartridge.boot + 0x02].write16 = m68k.memory_map[scd.cartridge.boot + 0x03].write16 = m68k_unused_w_16;
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zbank_memory_map[scd.cartridge.boot + 0x02].read = zbank_memory_map[scd.cartridge.boot + 0x03].read = zbank_unused_r;
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zbank_memory_map[scd.cartridge.boot + 0x02].write = zbank_memory_map[scd.cartridge.boot + 0x03].write = zbank_unused_w;
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}
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/* Word-RAM */
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/* Word-RAM */
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if (scd.regs[0x03>>1].byte.l & 0x04)
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if (scd.regs[0x03>>1].byte.l & 0x04)
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{
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{
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@ -3,7 +3,7 @@
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* Main 68k bus handlers
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* Main 68k bus handlers
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*
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2015 Eke-Eke (Genesis Plus GX)
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*
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*
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* Redistribution and use of this code or any derivative works are permitted
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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* provided that the following conditions are met:
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@ -646,6 +646,8 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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case 0x01: /* SUB-CPU control */
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case 0x01: /* SUB-CPU control */
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{
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{
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unsigned int status = s68k.cpu_stopped;
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/* RESET bit */
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/* RESET bit */
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if (data & 0x01)
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if (data & 0x01)
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{
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{
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@ -674,6 +676,34 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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s68k_pulse_halt();
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s68k_pulse_halt();
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}
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}
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/* check if SUB-CPU status has changed */
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if (s68k.cpu_stopped != status)
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{
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unsigned int base = scd.cartridge.boot;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if (s68k.cpu_stopped & STOP_LEVEL_HALT)
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = NULL;
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = NULL;
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = NULL;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = NULL;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = NULL;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = NULL;
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}
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else
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = m68k_read_bus_8;
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = m68k_read_bus_16;
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = m68k_unused_w_16;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = zbank_unused_r;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = zbank_unused_w;
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}
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}
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scd.regs[0x00].byte.l = data;
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scd.regs[0x00].byte.l = data;
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return;
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return;
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}
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}
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@ -842,6 +872,8 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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{
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{
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case 0x00: /* SUB-CPU interrupt & control */
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case 0x00: /* SUB-CPU interrupt & control */
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{
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{
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unsigned int status = s68k.cpu_stopped;
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/* RESET bit */
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/* RESET bit */
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if (data & 0x01)
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if (data & 0x01)
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{
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{
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@ -870,6 +902,34 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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s68k_pulse_halt();
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s68k_pulse_halt();
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}
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}
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/* check if SUB-CPU status has changed */
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if (s68k.cpu_stopped != status)
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{
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unsigned int base = scd.cartridge.boot;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if (s68k.cpu_stopped & STOP_LEVEL_HALT)
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = NULL;
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = NULL;
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = NULL;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = NULL;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = NULL;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = NULL;
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}
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else
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = m68k_read_bus_8;
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = m68k_read_bus_16;
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = m68k_unused_w_16;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = zbank_unused_r;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = zbank_unused_w;
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}
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}
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/* IFL2 bit */
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/* IFL2 bit */
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if (data & 0x100)
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if (data & 0x100)
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{
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{
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@ -3,7 +3,7 @@
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* Main 68k bus handlers
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* Main 68k bus handlers
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*
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2015 Eke-Eke (Genesis Plus GX)
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*
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*
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* Redistribution and use of this code or any derivative works are permitted
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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* provided that the following conditions are met:
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