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[Core/Misc] MSVC compatibility fixes (backported from libretro repository)

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ekeeke 2021-10-05 19:40:08 +02:00
parent 485358ed09
commit 8be7c0269b
5 changed files with 40 additions and 38 deletions
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68
core/cd_hw/libchdr/deps/libFLAC/cpu.c
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@ -39,7 +39,7 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#if defined(_MSC_VER) && !defined(_XBOX) #if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310
# include <intrin.h> /* for __cpuid() and _xgetbv() */ # include <intrin.h> /* for __cpuid() and _xgetbv() */
#endif #endif
@ -49,11 +49,6 @@
#ifdef DEBUG #ifdef DEBUG
#include <stdio.h> #include <stdio.h>
#define dfprintf fprintf
#else
/* This is bad practice, it should be a static void empty function */
#define dfprintf(file, format, ...)
#endif #endif
@ -138,21 +133,23 @@ ia32_cpu_info (FLAC__CPUInfo *info)
info->ia32.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false; info->ia32.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false;
} }
dfprintf(stderr, "CPU info (IA-32):\n"); #ifdef DEBUG
dfprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n'); fprintf(stderr, "CPU info (IA-32):\n");
dfprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n'); fprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n');
dfprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n'); fprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n');
dfprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n'); fprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n');
dfprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n'); fprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n');
dfprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n'); fprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n');
dfprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n'); fprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n');
dfprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n'); fprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n');
fprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n');
if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) { if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) {
dfprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n'); fprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n');
dfprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n'); fprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n');
dfprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n'); fprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n');
} }
#endif
/* /*
* now have to check for OS support of AVX instructions * now have to check for OS support of AVX instructions
@ -164,9 +161,10 @@ ia32_cpu_info (FLAC__CPUInfo *info)
info->ia32.fma = false; info->ia32.fma = false;
} }
if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) { #ifdef DEBUG
dfprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n'); if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED)
} fprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n');
#endif
#else #else
info->use_asm = false; info->use_asm = false;
#endif #endif
@ -199,17 +197,20 @@ x86_64_cpu_info (FLAC__CPUInfo *info)
info->x86.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false; info->x86.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false;
} }
dfprintf(stderr, "CPU info (x86-64):\n"); #ifdef DEBUG
dfprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n'); fprintf(stderr, "CPU info (x86-64):\n");
dfprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n'); fprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n');
dfprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n'); fprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n');
dfprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n'); fprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n');
fprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n');
if (FLAC__AVX_SUPPORTED) { if (FLAC__AVX_SUPPORTED)
dfprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n'); {
dfprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n'); fprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n');
dfprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n'); fprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n');
fprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n');
} }
#endif
/* /*
* now have to check for OS support of AVX instructions * now have to check for OS support of AVX instructions
@ -221,9 +222,10 @@ x86_64_cpu_info (FLAC__CPUInfo *info)
info->x86.fma = false; info->x86.fma = false;
} }
if (FLAC__AVX_SUPPORTED) { #ifdef DEBUG
dfprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n'); if (FLAC__AVX_SUPPORTED)
} fprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n');
#endif
#else #else
/* Silence compiler warnings. */ /* Silence compiler warnings. */
(void) info; (void) info;

2
core/cd_hw/libchdr/deps/libFLAC/include/private/bitmath.h
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@ -38,7 +38,7 @@
#include "share/compat.h" #include "share/compat.h"
#if defined(_MSC_VER) && !defined(_XBOX) #if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310
#include <intrin.h> /* for _BitScanReverse* */ #include <intrin.h> /* for _BitScanReverse* */
#endif #endif

2
core/cd_hw/libchdr/deps/libFLAC/include/share/compat.h
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@ -49,7 +49,7 @@
#if defined _MSC_VER || defined __BORLANDC__ || defined __MINGW32__ #if defined _MSC_VER || defined __BORLANDC__ || defined __MINGW32__
#include <sys/types.h> /* for off_t */ #include <sys/types.h> /* for off_t */
#define FLAC__off_t __int64 /* use this instead of off_t to fix the 2 GB limit */ #define FLAC__off_t __int64 /* use this instead of off_t to fix the 2 GB limit */
#if !defined __MINGW32__ #if !defined __MINGW32__ && _MSC_VER && _MSC_VER > 1310
#define fseeko _fseeki64 #define fseeko _fseeki64
#define ftello _ftelli64 #define ftello _ftelli64
#else /* MinGW */ #else /* MinGW */

2
core/cd_hw/libchdr/src/chd.c
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@ -438,7 +438,7 @@ void *lzma_fast_alloc(void *p, size_t size)
addr = (uint32_t *)malloc(size + sizeof(uint32_t) + LZMA_MIN_ALIGNMENT_BYTES); addr = (uint32_t *)malloc(size + sizeof(uint32_t) + LZMA_MIN_ALIGNMENT_BYTES);
if (addr==NULL) if (addr==NULL)
return NULL; return NULL;
for (int scan = 0; scan < MAX_LZMA_ALLOCS; scan++) for (scan = 0; scan < MAX_LZMA_ALLOCS; scan++)
{ {
if (codec->allocptr[scan] == NULL) if (codec->allocptr[scan] == NULL)
{ {

4
core/ntsc/sms_ntsc.c
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@ -88,6 +88,7 @@ void sms_ntsc_init( sms_ntsc_t* ntsc, sms_ntsc_setup_t const* setup )
void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input, void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input,
int in_width, int vline) int in_width, int vline)
{ {
int n;
int const chunk_count = in_width / sms_ntsc_in_chunk; int const chunk_count = in_width / sms_ntsc_in_chunk;
/* handle extra 0, 1, or 2 pixels by placing them at beginning of row */ /* handle extra 0, 1, or 2 pixels by placing them at beginning of row */
@ -102,9 +103,8 @@ void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned
(SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2, (SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2,
(SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 ); (SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 );
sms_ntsc_out_t* restrict line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]); sms_ntsc_out_t* line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]);
int n;
input += in_extra; input += in_extra;
for ( n = chunk_count; n; --n ) for ( n = chunk_count; n; --n )