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https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-25 02:31:49 +01:00
[Core/Misc] MSVC compatibility fixes (backported from libretro repository)
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@ -39,7 +39,7 @@
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#include <stdlib.h>
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#include <string.h>
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#if defined(_MSC_VER) && !defined(_XBOX)
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#if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310
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# include <intrin.h> /* for __cpuid() and _xgetbv() */
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#endif
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@ -49,11 +49,6 @@
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#ifdef DEBUG
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#include <stdio.h>
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#define dfprintf fprintf
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#else
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/* This is bad practice, it should be a static void empty function */
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#define dfprintf(file, format, ...)
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#endif
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@ -138,21 +133,23 @@ ia32_cpu_info (FLAC__CPUInfo *info)
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info->ia32.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false;
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}
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dfprintf(stderr, "CPU info (IA-32):\n");
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dfprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n');
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dfprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n');
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dfprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n');
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dfprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n');
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dfprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n');
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dfprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n');
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dfprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n');
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dfprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n');
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#ifdef DEBUG
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fprintf(stderr, "CPU info (IA-32):\n");
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fprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n');
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fprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n');
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fprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n');
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fprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n');
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fprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n');
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fprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n');
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fprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n');
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fprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n');
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if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) {
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dfprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n');
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dfprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n');
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dfprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n');
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fprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n');
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fprintf(stderr, " FMA ........ %c\n", info->ia32.fma ? 'Y' : 'n');
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fprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n');
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}
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#endif
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/*
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* now have to check for OS support of AVX instructions
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@ -164,9 +161,10 @@ ia32_cpu_info (FLAC__CPUInfo *info)
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info->ia32.fma = false;
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}
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if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED) {
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dfprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n');
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}
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#ifdef DEBUG
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if (FLAC__HAS_X86INTRIN && FLAC__AVX_SUPPORTED)
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fprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n');
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#endif
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#else
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info->use_asm = false;
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#endif
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@ -199,17 +197,20 @@ x86_64_cpu_info (FLAC__CPUInfo *info)
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info->x86.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 ) ? true : false;
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}
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dfprintf(stderr, "CPU info (x86-64):\n");
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dfprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n');
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dfprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n');
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dfprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n');
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dfprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n');
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#ifdef DEBUG
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fprintf(stderr, "CPU info (x86-64):\n");
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fprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n');
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fprintf(stderr, " SSSE3 ...... %c\n", info->x86.ssse3 ? 'Y' : 'n');
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fprintf(stderr, " SSE41 ...... %c\n", info->x86.sse41 ? 'Y' : 'n');
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fprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n');
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if (FLAC__AVX_SUPPORTED) {
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dfprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n');
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dfprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n');
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dfprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n');
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if (FLAC__AVX_SUPPORTED)
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{
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fprintf(stderr, " AVX ........ %c\n", info->x86.avx ? 'Y' : 'n');
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fprintf(stderr, " FMA ........ %c\n", info->x86.fma ? 'Y' : 'n');
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fprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n');
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}
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#endif
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/*
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* now have to check for OS support of AVX instructions
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@ -221,9 +222,10 @@ x86_64_cpu_info (FLAC__CPUInfo *info)
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info->x86.fma = false;
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}
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if (FLAC__AVX_SUPPORTED) {
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dfprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n');
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}
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#ifdef DEBUG
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if (FLAC__AVX_SUPPORTED)
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fprintf(stderr, " AVX OS sup . %c\n", info->x86.avx ? 'Y' : 'n');
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#endif
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#else
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/* Silence compiler warnings. */
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(void) info;
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@ -38,7 +38,7 @@
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#include "share/compat.h"
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#if defined(_MSC_VER) && !defined(_XBOX)
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#if defined(_MSC_VER) && !defined(_XBOX) && _MSC_VER > 1310
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#include <intrin.h> /* for _BitScanReverse* */
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#endif
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@ -49,7 +49,7 @@
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#if defined _MSC_VER || defined __BORLANDC__ || defined __MINGW32__
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#include <sys/types.h> /* for off_t */
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#define FLAC__off_t __int64 /* use this instead of off_t to fix the 2 GB limit */
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#if !defined __MINGW32__
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#if !defined __MINGW32__ && _MSC_VER && _MSC_VER > 1310
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#define fseeko _fseeki64
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#define ftello _ftelli64
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#else /* MinGW */
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@ -438,7 +438,7 @@ void *lzma_fast_alloc(void *p, size_t size)
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addr = (uint32_t *)malloc(size + sizeof(uint32_t) + LZMA_MIN_ALIGNMENT_BYTES);
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if (addr==NULL)
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return NULL;
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for (int scan = 0; scan < MAX_LZMA_ALLOCS; scan++)
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for (scan = 0; scan < MAX_LZMA_ALLOCS; scan++)
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{
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if (codec->allocptr[scan] == NULL)
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{
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@ -88,6 +88,7 @@ void sms_ntsc_init( sms_ntsc_t* ntsc, sms_ntsc_setup_t const* setup )
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void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input,
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int in_width, int vline)
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{
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int n;
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int const chunk_count = in_width / sms_ntsc_in_chunk;
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/* handle extra 0, 1, or 2 pixels by placing them at beginning of row */
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@ -102,9 +103,8 @@ void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned
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(SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2,
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(SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 );
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sms_ntsc_out_t* restrict line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]);
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sms_ntsc_out_t* line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]);
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int n;
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input += in_extra;
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for ( n = chunk_count; n; --n )
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