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https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-26 03:01:50 +01:00
[Core/SCD] disable access to mirrored areas of PRG-RAM as well when SUB-CPU is not halted (continuing fix for Dungeon Explorer USA)
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@ -1475,30 +1475,34 @@ int scd_context_load(uint8 *state)
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/* PRG-RAM */
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/* PRG-RAM */
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load_param(scd.prg_ram, sizeof(scd.prg_ram));
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load_param(scd.prg_ram, sizeof(scd.prg_ram));
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/* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
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m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if ((scd.regs[0x00].byte.l & 0x03) != 0x01)
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if ((scd.regs[0x00].byte.l & 0x03) != 0x01)
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{
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is mapped to PRG-RAM 128K bank (mirrored every 256 KB) */
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m68k.memory_map[scd.cartridge.boot + 0x02].read8 = m68k.memory_map[scd.cartridge.boot + 0x03].read8 = NULL;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[scd.cartridge.boot + 0x02].read16 = m68k.memory_map[scd.cartridge.boot + 0x03].read16 = NULL;
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{
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m68k.memory_map[scd.cartridge.boot + 0x02].write8 = m68k.memory_map[scd.cartridge.boot + 0x03].write8 = NULL;
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m68k.memory_map[i].base = m68k.memory_map[i+1].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
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m68k.memory_map[scd.cartridge.boot + 0x02].write16 = m68k.memory_map[scd.cartridge.boot + 0x03].write16 = NULL;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = NULL;
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zbank_memory_map[scd.cartridge.boot + 0x02].read = zbank_memory_map[scd.cartridge.boot + 0x03].read = NULL;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = NULL;
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zbank_memory_map[scd.cartridge.boot + 0x02].write = zbank_memory_map[scd.cartridge.boot + 0x03].write = NULL;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = NULL;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = NULL;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = NULL;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = NULL;
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}
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}
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}
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else
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else
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{
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped (mirrored every 256 KB) */
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m68k.memory_map[scd.cartridge.boot + 0x02].read8 = m68k.memory_map[scd.cartridge.boot + 0x03].read8 = m68k_read_bus_8;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[scd.cartridge.boot + 0x02].read16 = m68k.memory_map[scd.cartridge.boot + 0x03].read16 = m68k_read_bus_16;
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{
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m68k.memory_map[scd.cartridge.boot + 0x02].write8 = m68k.memory_map[scd.cartridge.boot + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[i].base = m68k.memory_map[i+1].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
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m68k.memory_map[scd.cartridge.boot + 0x02].write16 = m68k.memory_map[scd.cartridge.boot + 0x03].write16 = m68k_unused_w_16;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = m68k_read_bus_8;
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zbank_memory_map[scd.cartridge.boot + 0x02].read = zbank_memory_map[scd.cartridge.boot + 0x03].read = zbank_unused_r;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = m68k_read_bus_16;
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zbank_memory_map[scd.cartridge.boot + 0x02].write = zbank_memory_map[scd.cartridge.boot + 0x03].write = zbank_unused_w;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = m68k_unused_8_w;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = m68k_unused_16_w;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = zbank_unused_r;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = zbank_unused_w;
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}
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}
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}
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/* Word-RAM */
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/* Word-RAM */
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@ -646,7 +646,7 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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case 0x01: /* SUB-CPU control */
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case 0x01: /* SUB-CPU control */
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{
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{
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unsigned int status = s68k.cpu_stopped;
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unsigned int halted = s68k.stopped;
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/* RESET bit */
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/* RESET bit */
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if (data & 0x01)
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if (data & 0x01)
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@ -676,31 +676,37 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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s68k_pulse_halt();
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s68k_pulse_halt();
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}
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}
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/* check if SUB-CPU status has changed */
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/* check if SUB-CPU halt status has changed */
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if (s68k.cpu_stopped != status)
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if (s68k.stopped != halted)
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{
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{
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unsigned int base = scd.cartridge.boot;
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int i;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if (s68k.cpu_stopped & STOP_LEVEL_HALT)
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if ((data & 0x03) != 0x01)
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{
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is mapped to PRG-RAM 128K bank (mirrored every 256 KB) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = NULL;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = NULL;
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{
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = NULL;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = NULL;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = NULL;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = NULL;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = NULL;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = NULL;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = NULL;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = NULL;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = NULL;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = NULL;
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}
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}
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}
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else
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else
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{
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped (mirrored every 256 KB) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = m68k_read_bus_8;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = m68k_read_bus_16;
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{
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = m68k_read_bus_8;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = m68k_unused_w_16;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = m68k_read_bus_16;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = zbank_unused_r;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = m68k_unused_8_w;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = zbank_unused_w;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = m68k_unused_16_w;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = zbank_unused_r;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = zbank_unused_w;
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}
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}
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}
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}
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}
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@ -872,7 +878,7 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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{
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{
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case 0x00: /* SUB-CPU interrupt & control */
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case 0x00: /* SUB-CPU interrupt & control */
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{
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{
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unsigned int status = s68k.cpu_stopped;
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unsigned int halted = s68k.stopped;
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/* RESET bit */
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/* RESET bit */
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if (data & 0x01)
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if (data & 0x01)
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@ -902,31 +908,37 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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s68k_pulse_halt();
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s68k_pulse_halt();
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}
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}
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/* check if SUB-CPU status has changed */
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/* check if SUB-CPU halt status has changed */
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if (s68k.cpu_stopped != status)
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if (s68k.stopped != halted)
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{
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{
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unsigned int base = scd.cartridge.boot;
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int i;
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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/* PRG-RAM can only be accessed from MAIN 68K & Z80 when SUB-CPU is halted (Dungeon Explorer USA version) */
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if (s68k.cpu_stopped & STOP_LEVEL_HALT)
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if ((data & 0x03) != 0x01)
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{
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{
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/* PRG-RAM (128KB bank) is mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is mapped to PRG-RAM 128K bank (mirrored every 256 KB) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = NULL;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = NULL;
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{
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = NULL;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = NULL;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = NULL;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = NULL;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = NULL;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = NULL;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = NULL;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = NULL;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = NULL;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = NULL;
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}
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}
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}
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else
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else
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{
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{
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped */
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/* $020000-$03FFFF (resp. $420000-$43FFFF) is not mapped (mirrored every 256 KB) */
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m68k.memory_map[base + 0x02].read8 = m68k.memory_map[base + 0x03].read8 = m68k_read_bus_8;
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for (i=scd.cartridge.boot+0x02; i<scd.cartridge.boot+0x20; i+=4)
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m68k.memory_map[base + 0x02].read16 = m68k.memory_map[base + 0x03].read16 = m68k_read_bus_16;
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{
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m68k.memory_map[base + 0x02].write8 = m68k.memory_map[base + 0x03].write8 = m68k_unused_w_8;
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m68k.memory_map[i].read8 = m68k.memory_map[i+1].read8 = m68k_read_bus_8;
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m68k.memory_map[base + 0x02].write16 = m68k.memory_map[base + 0x03].write16 = m68k_unused_w_16;
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m68k.memory_map[i].read16 = m68k.memory_map[i+1].read16 = m68k_read_bus_16;
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zbank_memory_map[base + 0x02].read = zbank_memory_map[base + 0x03].read = zbank_unused_r;
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m68k.memory_map[i].write8 = m68k.memory_map[i+1].write8 = m68k_unused_8_w;
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zbank_memory_map[base + 0x02].write = zbank_memory_map[base + 0x03].write = zbank_unused_w;
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m68k.memory_map[i].write16 = m68k.memory_map[i+1].write16 = m68k_unused_16_w;
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zbank_memory_map[i].read = zbank_memory_map[i+1].read = zbank_unused_r;
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zbank_memory_map[i].write = zbank_memory_map[i+1].write = zbank_unused_w;
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}
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}
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}
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}
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}
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