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Genesis Plus GX 1.6.0 ---------------------- [Core/Sound] --------------- * added YM2413 emulation in Master System compatibility mode. * fixed SN76489 noise boost initialization. * minor YM2612 core optimizations. [Core/VDP] --------------- * added accurate emulation of SG-1000, Master System (315-5124, 315-5246) & Game Gear VDP. * added support for all TMS9918 rendering modes. * improved Mega Drive VDP timings accuracy in Master System Compatibility mode. * fixed color palette initialization. * fixed shifted sprites rendering in Mode 4. * modified pixel rendering support (pixel depth is now forced at compilation time). [Core/CPU] --------------- * optimized 68k core (rewrote 68k interrupt handling, removed multiple CPU types support & unused code) for 5~8% speed improvment [Core/IO] --------------- * added accurate emulation of Master System (315-5216, 315-5237, 315-5297) & Game Gear I/O controllers. * added Terebi Oekaki tablet emulation. * improved Mouse emulation (fixes mouse support in Cannon Fodder). * improved Justifier emulation (fixes gun support in Lethal Enforcers 2). * improved 6-Buttons control pad emulation (fixes Duke Nukem 3D) * modified lightgun emulation to use common key inputs for all devices. * 2-buttons controller is now picked by default for Master System games. [Core/MD] --------------- * added copy-protection hardware emulation for some new dumped games (Tiny Toon Adventures 3, Mighty Morphin Power Rangers & The Battle of Red Cliffs). * added Game Toshokan in EEPROM database (verified on real cartridge). * fixed Micro Machines 2 - Turbo Tournament EEPROM size (verified on real cartridge). * modified SRAM banswitch hardware emulation to be more compatible with some hacks. [Core/MS] --------------- * added Cyborg Z to Korean mapper database. [Core/GG] --------------- * added 93C46 EEPROM emulation (Majors Pro Baseball, World Series Baseball & World Series Baseball 95). [Core/General] --------------- * added support for .mdx ROM format. * added Game Gear & SG-1000 ROM support. * added accurate emulation of SG-1000, Master System (I, II) & Game Gear hardware models for 100% compatibility. * updated to new Genesis Plus license (see http://cgfm2.emuviews.com/) * removed DOS port * various code cleanup. [Gamecube/Wii] --------------- * IMPORTANT: cheats, screenshots & save files are now stored in console-specific directories (ex: /snaps/md, /cheats/ms, /saves/gg, ...) * added 8-bit Action Replay & Game Genie codes support (for Master System & Game Gear games). * improved audio/video synchronization for PAL games in 50Hz TV modes (now use VSYNC like NTSC games in 60hz modes). * improved gun cursor positioning accuracy. * improved horizontal scaling & screenshots rendering in H32 mode. * fixed a bug with ROM file extension handling that would affect cheats, snapshots, sram & savestate files. * removed ARAM/injected ROM support (unused). * removed WPAD_ and PAD_ update from VSYNC callback. * increased GCC inlining limits for some speed improvment. * compiled with devkitPPC r24 & libogc 1.8.7.
749 lines
17 KiB
C
749 lines
17 KiB
C
/***************************************************************************************
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* Genesis Plus
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* 68k bus handlers
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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*
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* - Redistributions may not be sold, nor may they be used in a commercial
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* product or activity.
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*
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* - Redistributions that are modified from the original source must include the
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* complete source code, including the source code for all components used by a
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* binary built from the modified sources. However, as a special exception, the
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* source code distributed need not include anything that is normally distributed
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* (in either source or binary form) with the major components (compiler, kernel,
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* and so on) of the operating system on which the executable runs, unless that
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* component itself accompanies the executable.
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*
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* - Redistributions must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#include "shared.h"
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#include "m68kcpu.h"
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/*--------------------------------------------------------------------------*/
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/* Unused area (return open bus data, i.e prefetched instruction word) */
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/*--------------------------------------------------------------------------*/
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unsigned int m68k_read_bus_8(unsigned int address)
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{
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#ifdef LOGERROR
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error("Unused read8 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
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#endif
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return m68k_read_pcrelative_8(REG_PC | (address & 1));
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}
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unsigned int m68k_read_bus_16(unsigned int address)
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{
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#ifdef LOGERROR
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error("Unused read16 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
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#endif
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return m68k_read_pcrelative_16(REG_PC);
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}
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void m68k_unused_8_w (unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error("Unused write8 %08X = %02X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
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#endif
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}
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void m68k_unused_16_w (unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error("Unused write16 %08X = %04X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
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#endif
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}
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/*--------------------------------------------------------------------------*/
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/* Illegal area (cause system to lock-up since !DTACK is not returned) */
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/*--------------------------------------------------------------------------*/
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void m68k_lockup_w_8 (unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %02X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
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#endif
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if (!config.force_dtack)
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{
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m68k_pulse_halt();
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}
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}
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void m68k_lockup_w_16 (unsigned int address, unsigned int data)
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{
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#ifdef LOGERROR
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error ("Lockup %08X = %04X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
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#endif
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if (!config.force_dtack)
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{
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m68k_pulse_halt();
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}
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}
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unsigned int m68k_lockup_r_8 (unsigned int address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
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#endif
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if (!config.force_dtack)
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{
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m68k_pulse_halt();
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}
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return m68k_read_pcrelative_8(REG_PC | (address & 1));
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}
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unsigned int m68k_lockup_r_16 (unsigned int address)
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{
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#ifdef LOGERROR
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error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
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#endif
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if (!config.force_dtack)
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{
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m68k_pulse_halt();
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}
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return m68k_read_pcrelative_16(REG_PC);
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}
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/*--------------------------------------------------------------------------*/
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/* Z80 bus (accessed through I/O chip) */
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/*--------------------------------------------------------------------------*/
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unsigned int z80_read_byte(unsigned int address)
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{
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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{
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return fm_read(mcycles_68k, address & 3);
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}
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case 3: /* Misc */
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{
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if ((address & 0xFF00) == 0x7F00)
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{
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/* VDP (through 68k bus) */
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return m68k_lockup_r_8(address);
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}
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return (m68k_read_bus_8(address) | 0xFF);
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}
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default: /* ZRAM */
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{
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return zram[address & 0x1FFF];
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}
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}
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}
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unsigned int z80_read_word(unsigned int address)
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{
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unsigned int data = z80_read_byte(address);
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return (data | (data << 8));
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}
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void z80_write_byte(unsigned int address, unsigned int data)
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{
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switch ((address >> 13) & 3)
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{
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case 2: /* YM2612 */
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{
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fm_write(mcycles_68k, address & 3, data);
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return;
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}
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case 3:
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{
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switch ((address >> 8) & 0x7F)
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{
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case 0x60: /* Bank register */
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{
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gen_zbank_w(data & 1);
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return;
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}
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case 0x7F: /* VDP */
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{
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m68k_lockup_w_8(address, data);
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return;
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}
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default:
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{
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m68k_unused_8_w(address, data);
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return;
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}
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}
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}
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default: /* ZRAM */
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{
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zram[address & 0x1FFF] = data;
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mcycles_68k += 8; /* ZRAM access latency (fixes Pacman 2: New Adventures) */
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return;
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}
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}
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}
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void z80_write_word(unsigned int address, unsigned int data)
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{
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z80_write_byte(address, data >> 8);
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}
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/*--------------------------------------------------------------------------*/
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/* I/O Control */
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/*--------------------------------------------------------------------------*/
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unsigned int ctrl_io_read_byte(unsigned int address)
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{
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switch ((address >> 8) & 0xFF)
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{
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case 0x00: /* I/O chip */
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{
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if (!(address & 0xE0))
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{
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return io_68k_read((address >> 1) & 0x0F);
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}
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return m68k_read_bus_8(address);
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}
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case 0x11: /* BUSACK */
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{
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if (!(address & 1))
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{
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/* Unused bits return prefetched bus data (Time Killers) */
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xFE;
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if (zstate == 3)
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{
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return data;
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}
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return (data | 0x01);
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}
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return m68k_read_bus_8(address);
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}
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case 0x30: /* TIME */
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{
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if (cart.hw.time_r)
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{
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unsigned int data = cart.hw.time_r(address);
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if (address & 1)
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{
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return (data & 0xFF);
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}
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return (data >> 8);
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}
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return m68k_read_bus_8(address);
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}
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case 0x41: /* OS ROM */
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{
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if (address & 1)
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{
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xFE;
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return (gen_bankswitch_r() | data);
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}
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return m68k_read_bus_8(address);
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}
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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{
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return m68k_read_bus_8(address);
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}
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default: /* Invalid address */
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{
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return m68k_lockup_r_8(address);
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}
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}
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}
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unsigned int ctrl_io_read_word(unsigned int address)
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{
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switch ((address >> 8) & 0xFF)
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{
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case 0x00: /* I/O chip */
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{
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if (!(address & 0xE0))
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{
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unsigned int data = io_68k_read((address >> 1) & 0x0F);
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return (data << 8 | data);
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}
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return m68k_read_bus_16(address);
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}
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case 0x11: /* BUSACK */
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{
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/* Unused bits return prefetched bus data (Time Killers) */
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unsigned int data = m68k_read_pcrelative_16(REG_PC) & 0xFEFF;
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if (zstate == 3)
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{
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return data;
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}
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return (data | 0x0100);
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}
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case 0x30: /* TIME */
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{
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if (cart.hw.time_r)
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{
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return cart.hw.time_r(address);
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}
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return m68k_read_bus_16(address);
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}
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case 0x50: /* SVP */
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{
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if ((address & 0xFD) == 0)
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{
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return svp->ssp1601.gr[SSP_XST].h;
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}
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if ((address & 0xFF) == 4)
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{
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unsigned int data = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return data;
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}
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return m68k_read_bus_16(address);
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}
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x41: /* OS ROM */
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case 0x44: /* RADICA */
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{
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return m68k_read_bus_16(address);
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}
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default: /* Invalid address */
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{
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return m68k_lockup_r_16(address);
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}
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}
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}
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void ctrl_io_write_byte(unsigned int address, unsigned int data)
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{
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switch ((address >> 8) & 0xFF)
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{
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case 0x00: /* I/O chip */
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{
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if ((address & 0xE1) == 0x01)
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{
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/* get /LWR only */
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io_68k_write((address >> 1) & 0x0F, data);
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return;
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}
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x11: /* BUSREQ */
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{
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if (!(address & 1))
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{
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gen_zbusreq_w(data & 1, mcycles_68k);
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return;
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}
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x12: /* RESET */
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{
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if (!(address & 1))
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{
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gen_zreset_w(data & 1, mcycles_68k);
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return;
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}
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x30: /* TIME */
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{
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cart.hw.time_w(address, data);
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return;
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}
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case 0x41: /* OS ROM */
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{
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if (address & 1)
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{
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gen_bankswitch_w(data & 1);
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return;
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}
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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case 0x44: /* RADICA */
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case 0x50: /* SVP REGISTERS */
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{
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m68k_unused_8_w(address, data);
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return;
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}
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default: /* Invalid address */
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{
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m68k_lockup_w_8(address, data);
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return;
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}
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}
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}
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void ctrl_io_write_word(unsigned int address, unsigned int data)
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{
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switch ((address >> 8) & 0xFF)
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{
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case 0x00: /* I/O chip */
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{
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if (!(address & 0xE0))
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{
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io_68k_write((address >> 1) & 0x0F, data & 0xFF);
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return;
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}
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m68k_unused_16_w(address, data);
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return;
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}
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case 0x11: /* BUSREQ */
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{
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gen_zbusreq_w((data >> 8) & 1, mcycles_68k);
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return;
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}
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case 0x12: /* RESET */
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{
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gen_zreset_w((data >> 8) & 1, mcycles_68k);
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return;
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}
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case 0x30: /* TIME */
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{
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cart.hw.time_w(address, data);
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return;
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}
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case 0x40: /* TMSS */
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{
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if (config.tmss & 1)
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{
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gen_tmss_w(address & 3, data);
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return;
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}
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m68k_unused_16_w(address, data);
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return;
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}
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case 0x50: /* SVP REGISTERS */
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{
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if (!(address & 0xFD))
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{
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svp->ssp1601.gr[SSP_XST].h = data;
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svp->ssp1601.gr[SSP_PM0].h |= 2;
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svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
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return;
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}
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m68k_unused_16_w(address, data);
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return;
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}
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x41: /* OS ROM */
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case 0x44: /* RADICA */
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{
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m68k_unused_16_w (address, data);
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return;
|
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}
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|
|
default: /* Invalid address */
|
|
{
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m68k_lockup_w_16 (address, data);
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return;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/*--------------------------------------------------------------------------*/
|
|
/* VDP */
|
|
/*--------------------------------------------------------------------------*/
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unsigned int vdp_read_byte(unsigned int address)
|
|
{
|
|
switch (address & 0xFD)
|
|
{
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case 0x00: /* DATA */
|
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{
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return (vdp_68k_data_r() >> 8);
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}
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case 0x01: /* DATA */
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{
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return (vdp_68k_data_r() & 0xFF);
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}
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|
|
case 0x04: /* CTRL */
|
|
{
|
|
/* Unused bits return prefetched bus data */
|
|
return (((vdp_68k_ctrl_r(mcycles_68k) >> 8) & 3) | (m68k_read_pcrelative_8(REG_PC) & 0xFC));
|
|
}
|
|
|
|
case 0x05: /* CTRL */
|
|
{
|
|
return (vdp_68k_ctrl_r(mcycles_68k) & 0xFF);
|
|
}
|
|
|
|
case 0x08: /* HVC */
|
|
case 0x0C:
|
|
{
|
|
return (vdp_hvc_r(mcycles_68k) >> 8);
|
|
}
|
|
|
|
case 0x09: /* HVC */
|
|
case 0x0D:
|
|
{
|
|
return (vdp_hvc_r(mcycles_68k) & 0xFF);
|
|
}
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x19:
|
|
case 0x1C:
|
|
case 0x1D:
|
|
{
|
|
return m68k_read_bus_8(address);
|
|
}
|
|
|
|
default: /* Invalid address */
|
|
{
|
|
return m68k_lockup_r_8(address);
|
|
}
|
|
}
|
|
}
|
|
|
|
unsigned int vdp_read_word(unsigned int address)
|
|
{
|
|
switch (address & 0xFC)
|
|
{
|
|
case 0x00: /* DATA */
|
|
{
|
|
return vdp_68k_data_r();
|
|
}
|
|
|
|
case 0x04: /* CTRL */
|
|
{
|
|
/* Unused bits return prefetched bus data */
|
|
return ((vdp_68k_ctrl_r(mcycles_68k) & 0x3FF) | (m68k_read_pcrelative_16(REG_PC) & 0xFC00));
|
|
}
|
|
|
|
case 0x08: /* HVC */
|
|
case 0x0C:
|
|
{
|
|
return vdp_hvc_r(mcycles_68k);
|
|
}
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x1C:
|
|
{
|
|
return m68k_read_bus_16(address);
|
|
}
|
|
|
|
default: /* Invalid address */
|
|
{
|
|
return m68k_lockup_r_16(address);
|
|
}
|
|
}
|
|
}
|
|
|
|
void vdp_write_byte(unsigned int address, unsigned int data)
|
|
{
|
|
switch (address & 0xFC)
|
|
{
|
|
case 0x00: /* Data port */
|
|
{
|
|
vdp_68k_data_w(data << 8 | data);
|
|
return;
|
|
}
|
|
|
|
case 0x04: /* Control port */
|
|
{
|
|
vdp_68k_ctrl_w(data << 8 | data);
|
|
return;
|
|
}
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14:
|
|
{
|
|
if (address & 1)
|
|
{
|
|
psg_write(mcycles_68k, data);
|
|
return;
|
|
}
|
|
m68k_unused_8_w(address, data);
|
|
return;
|
|
}
|
|
|
|
case 0x18: /* Unused */
|
|
{
|
|
m68k_unused_8_w(address, data);
|
|
return;
|
|
}
|
|
|
|
case 0x1C: /* TEST register */
|
|
{
|
|
vdp_test_w(data << 8 | data);
|
|
return;
|
|
}
|
|
|
|
default: /* Invalid address */
|
|
{
|
|
m68k_lockup_w_8(address, data);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
void vdp_write_word(unsigned int address, unsigned int data)
|
|
{
|
|
switch (address & 0xFC)
|
|
{
|
|
case 0x00: /* DATA */
|
|
{
|
|
vdp_68k_data_w(data);
|
|
return;
|
|
}
|
|
|
|
case 0x04: /* CTRL */
|
|
{
|
|
vdp_68k_ctrl_w(data);
|
|
return;
|
|
}
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14:
|
|
{
|
|
psg_write(mcycles_68k, data & 0xFF);
|
|
return;
|
|
}
|
|
|
|
case 0x18: /* Unused */
|
|
{
|
|
m68k_unused_16_w(address, data);
|
|
return;
|
|
}
|
|
|
|
case 0x1C: /* Test register */
|
|
{
|
|
vdp_test_w(data);
|
|
return;
|
|
}
|
|
|
|
default: /* Invalid address */
|
|
{
|
|
m68k_lockup_w_16 (address, data);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/******* PICO ************************************************/
|
|
|
|
unsigned int pico_read_byte(unsigned int address)
|
|
{
|
|
/* PICO */
|
|
switch (address & 0xFF)
|
|
{
|
|
case 0x01: /* VERSION register */
|
|
{
|
|
return 0x40;
|
|
}
|
|
|
|
case 0x03: /* IO register */
|
|
{
|
|
unsigned int retval = 0xFF;
|
|
if (input.pad[0] & INPUT_B) retval &= ~0x10;
|
|
if (input.pad[0] & INPUT_A) retval &= ~0x80;
|
|
if (input.pad[0] & INPUT_UP) retval &= ~0x01;
|
|
if (input.pad[0] & INPUT_DOWN) retval &= ~0x02;
|
|
if (input.pad[0] & INPUT_LEFT) retval &= ~0x04;
|
|
if (input.pad[0] & INPUT_RIGHT) retval &= ~0x08;
|
|
retval &= ~0x20;
|
|
retval &= ~0x40;
|
|
return retval;
|
|
}
|
|
|
|
case 0x05: /* MSB PEN X coordinate */
|
|
{
|
|
return (input.analog[0][0] >> 8);
|
|
}
|
|
|
|
case 0x07: /* LSB PEN X coordinate */
|
|
{
|
|
return (input.analog[0][0] & 0xFF);
|
|
}
|
|
|
|
case 0x09: /* MSB PEN Y coordinate */
|
|
{
|
|
return (input.analog[0][1] >> 8);
|
|
}
|
|
|
|
case 0x0B: /* LSB PEN Y coordinate */
|
|
{
|
|
return (input.analog[0][1] & 0xFF);
|
|
}
|
|
|
|
case 0x0D: /* PAGE register (TODO) */
|
|
{
|
|
return pico_page[pico_current];
|
|
}
|
|
|
|
case 0x10: /* PCM registers (TODO) */
|
|
{
|
|
return 0x80;
|
|
}
|
|
|
|
default:
|
|
{
|
|
return m68k_read_bus_8(address);
|
|
}
|
|
}
|
|
}
|
|
|
|
unsigned int pico_read_word(unsigned int address)
|
|
{
|
|
return (pico_read_byte(address | 1) | (m68k_read_bus_8(address) << 8));
|
|
}
|