6 Commits

Author	SHA1	Message	Date
Polprzewodnikowy	0b18c55d1c	changed mem addressing	2022-07-30 19:39:49 +02:00
Polprzewodnikowy	47633e3f36	dd basics	2022-07-22 12:43:53 +02:00
Polprzewodnikowy	5cb0bb1581	ddipl enable separation	2022-07-01 18:25:39 +02:00
Polprzewodnikowy	ab9bd74e91	backup	2022-05-15 15:47:12 +02:00
Mateusz Faderewski	92e5c5747b	[SC64][FW][SW] Added 64DD implementation with USB streaming (#14)	2021-12-24 23:51:30 +01:00
Mateusz Faderewski	45fbd53001	[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)	2021-09-25 20:00:36 +02:00