Commit Graph

17 Commits

Author SHA1 Message Date
Polprzewodnikowy
c475b62197 PI access prioritize 2022-09-29 02:07:52 +02:00
Polprzewodnikowy
0a06fd26a5 fixed fast PI read, added PI R/W fifo debug info 2022-09-29 00:06:21 +02:00
Polprzewodnikowy
ad802282b7 delayed address latching cycle - might break other builds, needs testing 2022-09-16 21:50:49 +02:00
Polprzewodnikowy
2cc618b268 extended ROM and ISV fixes 2022-09-02 22:48:47 +02:00
Polprzewodnikowy
dbf4b5e3c8 moved lock to cfg address space 2022-08-30 15:52:55 +02:00
Polprzewodnikowy
30f0fc002e added cfg lock mechanism 2022-08-30 01:04:25 +02:00
Polprzewodnikowy
0b18c55d1c changed mem addressing 2022-07-30 19:39:49 +02:00
Polprzewodnikowy
470b61aad9 pre DMA rewrite, created dedicated buffer memory space, simplified code 2022-07-18 21:15:19 +02:00
Polprzewodnikowy
5cb0bb1581 ddipl enable separation 2022-07-01 18:25:39 +02:00
Polprzewodnikowy
ab9bd74e91 backup 2022-05-15 15:47:12 +02:00
Polprzewodnikowy
89e84f10fb pretend we have 128 MB sdram 2022-02-07 22:24:37 +01:00
Polprzewodnikowy
a22f2efa87 ISV in hardware finally 2022-01-22 23:19:07 +01:00
Polprzewodnikowy
ccaa4a815e cpu buffer 2022-01-20 20:28:59 +01:00
Polprzewodnikowy
4b888d0f71 isv support + usb/dd improvements 2021-12-27 00:01:07 +01:00
Mateusz Faderewski
92e5c5747b
[SC64][FW][SW] Added 64DD implementation with USB streaming (#14) 2021-12-24 23:51:30 +01:00
Mateusz Faderewski
71f134178a
[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13) 2021-12-10 17:36:30 +01:00
Mateusz Faderewski
45fbd53001
[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00