Mateusz Faderewski 2a33bffd72 register PI reg bus		2024-06-12 02:21:13 +02:00
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fifo	[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)	2022-11-10 11:46:54 +01:00
mcu	[SC64][FW][SW] Added option to set and read century when updating RTC datetime	2024-06-06 23:00:38 +02:00
memory	[SC64][FW] Flash: fixed partial page write + handle data mask during write	2024-05-03 17:49:44 +02:00
n64	register PI reg bus	2024-06-12 02:21:13 +02:00
sd	[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)	2022-11-10 11:46:54 +01:00
serv	[SC64][FW][SW] Moved CIC emulation from MCU to FPGA (#56)	2023-12-14 19:26:54 +01:00
usb	[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)	2022-11-10 11:46:54 +01:00
vendor	[SC64][FW] Set timing constraints for SDRAM pins	2024-05-05 07:08:44 +02:00
top.sv	[SC64][FW] Added placeholder test point outputs in the FPGA project	2024-05-03 17:55:40 +02:00