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sd2snes/verilog/sd2snes_cx4/sd2snes_cx4.qpf
ikari a01fb3d6a1 Revise project structure
Makefile based build for FPGA configurations, firmware, SuperCIC,
release packaging. Probably needs more polishing.
2019-05-20 00:33:28 +02:00

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
# Date created = 23:44:44 August 23, 2017
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "17.0"
DATE = "23:44:44 August 23, 2017"
# Revisions
PROJECT_REVISION = "main"