2009-07-31 18:37:42 +02:00
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/****************************************************************************
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* Genesis Plus
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2009-08-02 22:41:46 +02:00
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* DATEL Action Replay / Pro Action Replay emulation
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2009-07-31 18:37:42 +02:00
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*
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* Copyright (C) 2009 Eke-Eke (GCN/Wii port)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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***************************************************************************/
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#include "shared.h"
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2009-08-11 10:18:46 +02:00
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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2009-08-03 19:21:36 +02:00
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2010-05-17 13:01:52 +02:00
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struct
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2009-07-31 18:37:42 +02:00
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{
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uint8 enabled;
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2009-08-03 19:21:36 +02:00
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uint8 rom[0x20000];
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uint8 ram[0x10000];
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2009-07-31 18:37:42 +02:00
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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2009-08-02 22:41:46 +02:00
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static void wram_write_byte(uint32 address, uint32 data);
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static void wram_write_word(uint32 address, uint32 data);
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2009-08-11 19:25:38 +02:00
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static void ar_write_regs(uint32 address, uint32 data);
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static void ar_write_regs_pro2(uint32 address, uint32 data);
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2009-07-31 18:37:42 +02:00
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2009-08-02 22:41:46 +02:00
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void datel_init(void)
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2009-07-31 18:37:42 +02:00
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{
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memset(&action_replay,0,sizeof(action_replay));
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2010-05-17 13:01:52 +02:00
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/* Open Action Replay ROM */
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2009-08-02 22:41:46 +02:00
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FILE *f = fopen(AR_ROM,"rb");
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2010-05-17 13:01:52 +02:00
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if (!f)
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return;
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2009-07-31 18:37:42 +02:00
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2010-05-17 13:01:52 +02:00
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/* ROM size */
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fseek(f, 0, SEEK_END);
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int size = ftell(f);
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2009-08-03 19:21:36 +02:00
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2010-05-17 13:01:52 +02:00
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/* Detect Action Replay type */
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switch (size)
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2009-08-03 19:21:36 +02:00
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{
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2010-05-17 13:01:52 +02:00
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case 0x8000: /* ACTION REPLAY (32K) */
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2009-08-11 19:25:38 +02:00
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{
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2010-05-17 13:01:52 +02:00
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action_replay.enabled = TYPE_AR;
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2009-08-11 19:25:38 +02:00
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2009-08-03 19:21:36 +02:00
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/* $0000-$7fff mirrored into $8000-$ffff */
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memcpy(action_replay.rom+0x8000,action_replay.rom,0x8000);
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break;
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2009-08-11 19:25:38 +02:00
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}
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2009-08-03 19:21:36 +02:00
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2010-05-17 13:01:52 +02:00
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case 0x10000: /* PRO ACTION REPLAY 2 (64K) */
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2009-08-11 19:25:38 +02:00
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{
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2010-05-17 13:01:52 +02:00
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action_replay.enabled = TYPE_PRO2;
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/* RAM (64k) mapped at $600000-$60ffff */
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m68k_memory_map[0x60].base = action_replay.ram;
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m68k_memory_map[0x60].read8 = NULL;
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m68k_memory_map[0x60].read16 = NULL;
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m68k_memory_map[0x60].write8 = NULL;
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m68k_memory_map[0x60].write16 = NULL;
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break;
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}
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case 0x20000: /* PRO ACTION REPLAY (128K) */
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{
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action_replay.enabled = TYPE_PRO1;
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2009-08-11 19:25:38 +02:00
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2009-08-14 18:46:19 +02:00
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/* RAM (64k) mapped at $420000-$42ffff */
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m68k_memory_map[0x42].base = action_replay.ram;
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m68k_memory_map[0x42].read8 = NULL;
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m68k_memory_map[0x42].read16 = NULL;
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m68k_memory_map[0x42].write8 = NULL;
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m68k_memory_map[0x42].write16 = NULL;
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2009-08-03 19:21:36 +02:00
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break;
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2009-08-11 19:25:38 +02:00
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}
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2009-08-03 19:21:36 +02:00
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2010-05-17 13:01:52 +02:00
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default:
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return;
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}
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if (action_replay.enabled)
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{
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/* Load ROM */
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fseek(f, 0, SEEK_SET);
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int i = 0;
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while (i < size)
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2009-08-11 19:25:38 +02:00
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{
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2010-05-17 13:01:52 +02:00
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fread(action_replay.rom+i,0x1000,1,f);
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i += 0x1000;
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}
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2009-08-11 19:25:38 +02:00
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2010-05-17 13:01:52 +02:00
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#ifdef LSB_FIRST
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/* Byteswap ROM */
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uint8 temp;
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for(i = 0; i < size; i += 2)
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{
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temp = action_replay.rom[i];
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action_replay.rom[i] = action_replay.rom[i+1];
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action_replay.rom[i+1] = temp;
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2009-08-11 19:25:38 +02:00
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}
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2010-05-17 13:01:52 +02:00
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#endif
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2009-08-03 19:21:36 +02:00
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}
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2009-07-31 18:37:42 +02:00
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2010-05-17 13:01:52 +02:00
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fclose(f);
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}
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void datel_shutdown(void)
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{
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if (action_replay.enabled)
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2009-07-31 18:37:42 +02:00
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{
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2010-05-17 13:01:52 +02:00
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datel_switch(0);
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action_replay.enabled = 0;
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2009-07-31 18:37:42 +02:00
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}
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}
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2009-08-14 18:46:19 +02:00
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void datel_reset(int hard_reset)
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2009-07-31 18:37:42 +02:00
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{
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2010-05-17 13:01:52 +02:00
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/* reset external mapping */
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switch (action_replay.enabled)
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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case TYPE_AR:
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2009-08-14 18:46:19 +02:00
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2010-05-17 13:01:52 +02:00
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/* internal registers mapped at $010000-$01ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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2009-08-02 22:41:46 +02:00
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2010-05-17 13:01:52 +02:00
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/* internal ROM mapped at $000000-$00ffff */
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m68k_memory_map[0].base = action_replay.rom;
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break;
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2009-08-03 19:21:36 +02:00
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2010-05-17 13:01:52 +02:00
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case TYPE_PRO2:
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/* internal registers mapped at $100000-$10ffff */
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m68k_memory_map[0x10].write16 = ar_write_regs_pro2;
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/* internal ROM mapped at $000000-$00ffff */
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m68k_memory_map[0].base = action_replay.rom;
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break;
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case TYPE_PRO1:
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/* internal registers mapped at $010000-$01ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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/* internal ROM mapped at $000000-$01ffff */
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m68k_memory_map[0].base = action_replay.rom;
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m68k_memory_map[1].base = action_replay.rom + 0x10000;
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break;
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default:
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return;
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2009-08-02 22:41:46 +02:00
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}
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2010-05-17 13:01:52 +02:00
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/* clear existing codes */
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datel_switch(0);
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/* reset internal state */
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memset(action_replay.regs,0,sizeof(action_replay.regs));
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memset(action_replay.old,0,sizeof(action_replay.old));
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memset(action_replay.data,0,sizeof(action_replay.data));
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memset(action_replay.addr,0,sizeof(action_replay.addr));
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/* clear RAM on hard reset only */
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if (hard_reset)
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memset(action_replay.ram,0,sizeof(action_replay.ram));
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2009-08-02 22:41:46 +02:00
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}
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2009-07-31 18:37:42 +02:00
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2009-08-14 18:46:19 +02:00
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void datel_switch(int enable)
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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int i,use_wram = 0;
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2009-08-02 22:41:46 +02:00
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if (enable)
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2009-07-31 18:37:42 +02:00
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{
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2009-08-02 22:41:46 +02:00
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for (i=0; i<4; i++)
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{
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if (action_replay.data[i])
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{
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2010-05-17 13:01:52 +02:00
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/* store old values & patch new values */
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if (action_replay.addr[i] < 0x400000)
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{
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action_replay.old[i] = *(uint16 *)(cart.rom + (action_replay.addr[i]&~1));
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*(uint16 *)(cart.rom + (action_replay.addr[i]&~1)) = action_replay.data[i];
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}
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else
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{
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use_wram = 1;
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action_replay.old[i] = *(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe));
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if (action_replay.data[i] & 0xff00)
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*(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe)) = action_replay.data[i];
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else
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WRITE_BYTE(work_ram, (action_replay.addr[i]&0xfffe) + 1, action_replay.data[i] & 0xff);
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}
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2009-08-02 22:41:46 +02:00
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}
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}
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2009-07-31 18:37:42 +02:00
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2010-05-17 13:01:52 +02:00
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if (use_wram)
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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/* use specific WRAM write handlers */
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for (i=0xe0; i<0x100; i++)
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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m68k_memory_map[i].write8 = wram_write_byte;
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m68k_memory_map[i].write16 = wram_write_word;
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2009-08-02 22:41:46 +02:00
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}
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}
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}
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else
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2009-07-31 18:37:42 +02:00
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{
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2009-08-02 22:41:46 +02:00
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/* restore original data */
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for (i=0; i<4; i++)
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{
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if (action_replay.data[i])
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{
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if (action_replay.addr[i] < 0x400000)
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2009-08-06 20:31:05 +02:00
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*(uint16 *)(cart.rom + action_replay.addr[i]) = action_replay.old[i];
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2010-05-17 13:01:52 +02:00
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else
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*(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe)) = action_replay.old[i];
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2009-08-02 22:41:46 +02:00
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}
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}
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2009-08-14 18:46:19 +02:00
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2010-05-17 13:01:52 +02:00
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/* default WRAM write handlers */
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2009-08-14 18:46:19 +02:00
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for (i=0xe0; i<0x100; i++)
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{
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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}
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2009-07-31 18:37:42 +02:00
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}
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}
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2009-08-02 22:41:46 +02:00
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static void wram_write_byte(uint32 address, uint32 data)
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2009-07-31 18:37:42 +02:00
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{
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2009-08-02 22:41:46 +02:00
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int i;
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for (i=0; i<4; i++)
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{
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2010-05-17 13:01:52 +02:00
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if (action_replay.data[i])
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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if ((address & 0xfffe) == (action_replay.addr[i] & 0xfffe))
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{
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WRITE_BYTE(&action_replay.old[i], address & 1, data);
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if (action_replay.data[i] & 0xff00)
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return;
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if ((address & 0xffff) == ((action_replay.addr[i]&0xfffe) + 1))
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return;
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}
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2009-08-02 22:41:46 +02:00
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}
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}
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WRITE_BYTE(work_ram, address & 0xffff, data);
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2009-07-31 18:37:42 +02:00
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}
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2009-08-02 22:41:46 +02:00
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static void wram_write_word(uint32 address, uint32 data)
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2009-07-31 18:37:42 +02:00
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{
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2010-05-17 13:01:52 +02:00
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*(uint16 *)(work_ram + (address & 0xffff)) = data;
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2009-08-02 22:41:46 +02:00
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int i;
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for (i=0; i<4; i++)
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{
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2010-05-17 13:01:52 +02:00
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if (action_replay.data[i])
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2009-08-02 22:41:46 +02:00
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{
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2010-05-17 13:01:52 +02:00
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if ((address & 0xffff) == (action_replay.addr[i] & 0xfffe))
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{
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action_replay.old[i] = data;
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if (action_replay.data[i] & 0xff00)
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*(uint16 *)(work_ram + (address & 0xfffe)) = action_replay.data[i];
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else
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WRITE_BYTE(work_ram, (action_replay.addr[i] & 0xfffe) + 1, action_replay.data[i]);
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}
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2009-08-02 22:41:46 +02:00
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}
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}
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2009-07-31 18:37:42 +02:00
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}
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static void ar_write_regs(uint32 address, uint32 data)
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{
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2010-05-17 13:01:52 +02:00
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/* register offset */
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int offset = (address & 0xffff) >> 1;
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if (offset > 12)
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2009-07-31 18:37:42 +02:00
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{
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m68k_unused_16_w(address,data);
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return;
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}
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/* update internal register */
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action_replay.regs[offset] = data;
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2010-05-17 13:01:52 +02:00
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/* exit program */
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if (action_replay.regs[3] == 0xffff)
|
2009-07-31 18:37:42 +02:00
|
|
|
{
|
2009-08-02 22:41:46 +02:00
|
|
|
/* decode patch data */
|
2009-07-31 18:37:42 +02:00
|
|
|
action_replay.data[0] = action_replay.regs[0];
|
|
|
|
action_replay.data[1] = action_replay.regs[4];
|
|
|
|
action_replay.data[2] = action_replay.regs[7];
|
|
|
|
action_replay.data[3] = action_replay.regs[10];
|
|
|
|
|
2009-08-02 22:41:46 +02:00
|
|
|
/* decode patch address */
|
2009-07-31 18:37:42 +02:00
|
|
|
action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x7f00) << 8)) << 1;
|
|
|
|
action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x7f00) << 8)) << 1;
|
|
|
|
action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x7f00) << 8)) << 1;
|
|
|
|
action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x7f00) << 8)) << 1;
|
|
|
|
|
2010-05-17 13:01:52 +02:00
|
|
|
/* enable Cartridge ROM */
|
2009-08-14 18:46:19 +02:00
|
|
|
m68k_memory_map[0].base = cart.rom;
|
|
|
|
m68k_memory_map[1].base = cart.rom + ((1<<16) & cart.mask);
|
2010-05-17 13:01:52 +02:00
|
|
|
|
|
|
|
/* disable internal registers (?) */
|
|
|
|
m68k_memory_map[0x01].write16 = m68k_unused_16_w;
|
|
|
|
|
|
|
|
/* enable patches */
|
|
|
|
datel_switch(1);
|
2009-07-31 18:37:42 +02:00
|
|
|
}
|
|
|
|
}
|
2009-08-11 19:25:38 +02:00
|
|
|
|
|
|
|
static void ar_write_regs_pro2(uint32 address, uint32 data)
|
|
|
|
{
|
2010-05-17 13:01:52 +02:00
|
|
|
/* enable Cartridge ROM */
|
2009-08-14 18:46:19 +02:00
|
|
|
if (((address & 0xff) == 0x78) && (data == 0xffff))
|
|
|
|
m68k_memory_map[0].base = cart.rom;
|
2009-08-18 18:45:09 +02:00
|
|
|
}
|