mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2025-01-14 04:09:08 +01:00
added Action Replay hardware emulation (incomplete, need more infos !)
added proper region detection for Korean games fixed Game Genie patches remaining active when disactivated
This commit is contained in:
ekeeke31
parent
f404e9eaa9
commit
3031072ee0
178
source/cart_hw/datel.c
Normal file
178
source/cart_hw/datel.c
Normal file
@ -0,0 +1,178 @@
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/****************************************************************************
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* Genesis Plus
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* Action Replay / Pro Action Replay emulation
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*
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* Copyright (C) 2009 Eke-Eke (GCN/Wii port)
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*
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* Based on reverse-engineering done on DATEL softwares
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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***************************************************************************/
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#include "shared.h"
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#ifdef TEST_AR
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static struct
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{
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uint8 enabled;
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uint8 rom[0x10000];
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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static void ar_write_byte(uint32 address, uint32 data);
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static void ar_write_regs(uint32 address, uint32 data);
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static void ar_write_word(uint32 address, uint32 data);
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void ar_init(void)
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{
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memset(&action_replay,0,sizeof(action_replay));
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/* load Game Genie ROM program */
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FILE *f = fopen("./areplay.bin","rb");
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if (!f) return;
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fread(action_replay.rom,1,0x8000,f);
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fclose(f);
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/* $0000-$7fff mirrored into $8000-$ffff */
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memcpy(action_replay.rom+0x8000,action_replay.rom,0x8000);
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#ifdef LSB_FIRST
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/* Byteswap ROM */
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int i;
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uint8 temp;
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for(i = 0; i < 0x10000; i += 2)
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{
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temp = action_replay.rom[i];
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action_replay.rom[i] = action_replay.rom[i+1];
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action_replay.rom[i+1] = temp;
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}
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#endif
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/* enable registers write */
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m68k_memory_map[1].write16 = ar_write_regs;
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/* set flag */
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action_replay.enabled = 1;
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}
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void ar_reset(void)
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{
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if (!action_replay.enabled) return;
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/* restore patched ROM */
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int i;
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for (i=0; i<4; i++)
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{
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if (action_replay.addr[i] < 0x400000)
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*(uint16 *)(cart_rom + action_replay.addr[i]) = action_replay.old[i];
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}
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/* reset internal state */
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memset(action_replay.regs,0,sizeof(action_replay.regs));
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memset(action_replay.old,0,sizeof(action_replay.old));
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memset(action_replay.data,0,sizeof(action_replay.data));
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memset(action_replay.addr,0,sizeof(action_replay.addr));
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/* slot 0 is mapped to Action replay ROM */
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m68k_memory_map[0].base = action_replay.rom;
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/* reset RAM handlers */
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for (i=0xe0; i<0x100; i++)
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{
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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}
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}
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static void ar_write_byte(uint32 address, uint32 data)
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{
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}
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static void ar_write_word(uint32 address, uint32 data)
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{
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}
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static void ar_write_regs(uint32 address, uint32 data)
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{
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if ((address > 0x10018) || (action_replay.regs[3] == 0xffff))
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{
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m68k_unused_16_w(address,data);
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return;
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}
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/* register offset */
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int offset = (address >> 1) & 0x0F;
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/* update internal register */
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action_replay.regs[offset] = data;
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/* decode patch value & address on exit */
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if ((offset == 3) && (data == 0xffff))
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{
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/* patch data */
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action_replay.data[0] = action_replay.regs[0];
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action_replay.data[1] = action_replay.regs[4];
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action_replay.data[2] = action_replay.regs[7];
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action_replay.data[3] = action_replay.regs[10];
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/* patch address */
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action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x7f00) << 8)) << 1;
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action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x7f00) << 8)) << 1;
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action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x7f00) << 8)) << 1;
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action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x7f00) << 8)) << 1;
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int i;
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for (i=0; i<4; i++)
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{
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offset = action_replay.addr[i] >> 16;
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/* ROM area */
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if (offset < 0x40)
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{
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/* store old ROM value */
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action_replay.old[i] = *(uint16 *)(cart_rom + action_replay.addr[i]);
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}
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/* Work RAM area */
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else if (offset >= 0xe0)
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{
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/* patch RAM */
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*(uint16 *)(work_ram + (action_replay.addr[i] & 0xffff)) = action_replay.data[i];
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/* setup handlers */
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m68k_memory_map[offset].write8 = ar_write_byte;
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m68k_memory_map[offset].write16 = ar_write_word;
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}
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}
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for (i=0; i<4; i++)
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{
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offset = action_replay.addr[i] >> 16;
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/* ROM area */
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if (offset < 0x40)
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{
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/* patch ROM */
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*(uint16 *)(cart_rom + action_replay.addr[i]) = action_replay.data[i];;
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}
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}
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/* reads are mapped to Cartridge ROM */
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m68k_memory_map[0].base = cart_rom;
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}
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}
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#endif
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@ -64,6 +64,10 @@ void ggenie_init(void)
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}
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#endif
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/* enable registers write */
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m68k_memory_map[0].write8 = ggenie_write_byte;
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m68k_memory_map[0].write16 = ggenie_write_word;
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/* set flag */
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ggenie.enabled = 1;
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}
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@ -86,12 +90,8 @@ void ggenie_reset(void)
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memset(ggenie.data,0,sizeof(ggenie.data));
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memset(ggenie.addr,0,sizeof(ggenie.addr));
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/* default slot mapping */
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/* reads are mapped to Game Genie ROM */
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/* writes are mapped to Game Genie internal registers */
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/* slot 0 is mapped to Game Genie ROM */
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m68k_memory_map[0].base = ggenie.rom;
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m68k_memory_map[0].write8 = ggenie_write_byte;
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m68k_memory_map[0].write16 = ggenie_write_word;
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m68k_memory_map[0].read16 = NULL;
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}
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@ -935,6 +935,7 @@ static void systemmenu ()
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else sprintf (items[4].text, "Lock-On: OFF");
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if (genromsize || (config.bios_enabled == 3))
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{
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system_reset (); /* clear any GG patches */
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system_init ();
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audio_init(48000);
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system_reset ();
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@ -347,6 +347,7 @@ void set_region ()
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if (c == 'U') country |= 4;
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else if (c == 'J') country |= 1;
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else if (c == 'E') country |= 8;
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else if (c == 'K') country |= 1;
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else if (c < 16) country |= c;
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else if ((c >= '0') && (c <= '9')) country |= c - '0';
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else if ((c >= 'A') && (c <= 'F')) country |= c - 'A' + 10;
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@ -155,7 +155,7 @@ uint32 z80_read_byte(uint32 address)
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return zram[address & 0x1fff];
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}
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}
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uint32 z80_read_word(uint32 address)
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{
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if (zbusack) return m68k_read_bus_16(address);
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@ -179,7 +179,7 @@ uint32 z80_read_word(uint32 address)
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}
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}
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}
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void z80_write_byte(uint32 address, uint32 data)
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{
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if (zbusack)
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@ -254,9 +254,9 @@ void z80_write_word(uint32 address, uint32 data)
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}
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}
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/******* I/O & CTRL ******************************************/
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uint32 ctrl_io_read_byte(uint32 address)
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{
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switch ((address >> 8) & 0xff)
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@ -325,14 +325,14 @@ uint32 ctrl_io_read_word(uint32 address)
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case 0x41: /* BOOTROM */
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case 0x44: /* RADICA */
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return m68k_read_bus_16(address);
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default: /* Invalid address */
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return m68k_lockup_r_16(address);
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}
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}
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void ctrl_io_write_byte(uint32 address, uint32 data)
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{
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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@ -358,7 +358,7 @@ void ctrl_io_write_byte(uint32 address, uint32 data)
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if (address & 1)
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{
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m68k_memory_map[0].base = (data & 1) ? default_rom : bios_rom;
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/* autodetect BIOS ROM file */
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if (!(config.bios_enabled & 2))
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{
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@ -385,22 +385,22 @@ void ctrl_io_write_byte(uint32 address, uint32 data)
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}
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void ctrl_io_write_word(uint32 address, uint32 data)
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{
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0) m68k_unused_16_w (address, data);
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else io_write ((address >> 1) & 0x0f, data & 0xff);
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return;
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case 0x11: /* BUSREQ */
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gen_busreq_w ((data >> 8) & 1);
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return;
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case 0x12: /* RESET */
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gen_reset_w ((data >> 8) & 1);
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return;
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case 0x50: /* SVP REGISTERS */
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if (svp)
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{
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@ -433,7 +433,7 @@ void ctrl_io_write_word(uint32 address, uint32 data)
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memset(cart_rom, 0, genromsize);
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}
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return;
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case 0x10: /* MEMORY MODE */
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case 0x20: /* MEGA-CD */
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case 0x40: /* TMSS */
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@ -456,20 +456,20 @@ uint32 vdp_read_byte(uint32 address)
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{
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case 0x00: /* DATA */
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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return (vdp_data_r() & 0xff);
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case 0x04: /* CTRL */
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return ((m68k_read_pcrelative_8(REG_PC) & 0xfc) | ((vdp_ctrl_r() >> 8) & 3));
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case 0x05: /* CTRL */
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return (vdp_ctrl_r() & 0xff);
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case 0x08: /* HVC */
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case 0x0c:
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return (vdp_hvc_r() >> 8);
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case 0x09: /* HVC */
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case 0x0d:
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return (vdp_hvc_r() & 0xff);
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@ -491,14 +491,14 @@ uint32 vdp_read_word(uint32 address)
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{
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case 0x00: /* DATA */
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return vdp_data_r();
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case 0x04: /* CTRL */
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return ((vdp_ctrl_r() & 0x3FF) | (m68k_read_pcrelative_16(REG_PC) & 0xFC00));
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case 0x08: /* HVC */
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case 0x0c:
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return vdp_hvc_r();
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case 0x18: /* Unused */
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case 0x1c:
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return m68k_read_bus_16(address);
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@ -525,7 +525,7 @@ void vdp_write_byte(uint32 address, uint32 data)
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if (address & 1) psg_write(0, data);
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else m68k_unused_8_w(address, data);
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return;
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case 0x18: /* Unused */
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m68k_unused_8_w(address, data);
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return;
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@ -616,8 +616,8 @@ uint32 pico_read_byte(uint32 address)
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case 0x12:
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case 0x13:
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return 0x80; /* TODO */
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default:
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default:
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return m68k_read_bus_8(address);
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}
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}
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@ -47,7 +47,7 @@ uint32 zbank_lockup_r(uint32 address)
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#ifdef LOGERROR
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error("Z80 bank lockup read %06X\n", address);
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#endif
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gen_running = config.force_dtack;
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gen_running = config.force_dtack;
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return 0xFF;
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}
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@ -56,7 +56,7 @@ void zbank_lockup_w(uint32 address, uint32 data)
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#ifdef LOGERROR
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error("Z80 bank lockup write %06X = %02X\n", address, data);
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#endif
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gen_running = config.force_dtack;
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gen_running = config.force_dtack;
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}
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/* I/O & Control registers */
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@ -47,7 +47,7 @@ static inline void z80_lockup_w(unsigned int address, unsigned int data)
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#ifdef LOGERROR
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error("Z80 lockup write %04X = %02X\n", address, data);
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#endif
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gen_running = config.force_dtack;
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gen_running = config.force_dtack;
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}
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static inline unsigned int z80_lockup_r(unsigned int address)
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@ -67,13 +67,13 @@ static inline unsigned int z80_vdp_r(unsigned int address)
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{
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case 0x00: /* DATA */
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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return (vdp_data_r() & 0xff);
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case 0x04: /* CTRL */
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return (0xfc | ((vdp_ctrl_r() >> 8) & 3));
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case 0x05: /* CTRL */
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return (vdp_ctrl_r() & 0xff);
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