added Action Replay hardware emulation (incomplete, need more infos !)

added proper region detection for Korean games
fixed Game Genie patches remaining active when disactivated

source/cart_hw/datel.c

@@ -0,0 +1,178 @@
+/****************************************************************************
+ *  Genesis Plus
+ *  Action Replay / Pro Action Replay emulation
+ *
+ *  Copyright (C) 2009  Eke-Eke (GCN/Wii port)
+ *
+ *  Based on reverse-engineering done on DATEL softwares
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ ***************************************************************************/
+
+#include "shared.h"
+
+#ifdef TEST_AR
+static struct
+{
+  uint8 enabled;
+  uint8 rom[0x10000];
+  uint16 regs[13];
+  uint16 old[4];
+  uint16 data[4];
+  uint32 addr[4];
+} action_replay;
+
+static void ar_write_byte(uint32 address, uint32 data);
+static void ar_write_regs(uint32 address, uint32 data);
+static void ar_write_word(uint32 address, uint32 data);
+
+void ar_init(void)
+{
+  memset(&action_replay,0,sizeof(action_replay));
+
+  /* load Game Genie ROM program */
+  FILE *f = fopen("./areplay.bin","rb");
+  if (!f) return;
+  fread(action_replay.rom,1,0x8000,f);
+  fclose(f);
+
+  /* $0000-$7fff mirrored into $8000-$ffff */
+  memcpy(action_replay.rom+0x8000,action_replay.rom,0x8000);
+
+#ifdef LSB_FIRST
+  /* Byteswap ROM */
+  int i;
+  uint8 temp;
+  for(i = 0; i < 0x10000; i += 2)
+  {
+    temp = action_replay.rom[i];
+    action_replay.rom[i] = action_replay.rom[i+1];
+    action_replay.rom[i+1] = temp;
+  }
+#endif
+
+  /* enable registers write */
+  m68k_memory_map[1].write16 = ar_write_regs;
+
+  /* set flag */
+  action_replay.enabled = 1;
+}
+
+void ar_reset(void)
+{
+  if (!action_replay.enabled) return;
+
+  /* restore patched ROM */
+  int i;
+  for (i=0; i<4; i++)
+  {
+    if (action_replay.addr[i] < 0x400000)
+      *(uint16 *)(cart_rom + action_replay.addr[i]) = action_replay.old[i];
+  }
+
+  /* reset internal state */
+  memset(action_replay.regs,0,sizeof(action_replay.regs));
+  memset(action_replay.old,0,sizeof(action_replay.old));
+  memset(action_replay.data,0,sizeof(action_replay.data));
+  memset(action_replay.addr,0,sizeof(action_replay.addr));
+
+  /* slot 0 is mapped to Action replay ROM */
+  m68k_memory_map[0].base = action_replay.rom;
+
+  /* reset RAM handlers */
+  for (i=0xe0; i<0x100; i++)
+  {
+    m68k_memory_map[i].write8 = NULL;
+    m68k_memory_map[i].write16 = NULL;
+  }
+}
+
+static void ar_write_byte(uint32 address, uint32 data)
+{
+}
+
+static void ar_write_word(uint32 address, uint32 data)
+{
+}
+
+static void ar_write_regs(uint32 address, uint32 data)
+{
+  if ((address > 0x10018) || (action_replay.regs[3] == 0xffff))
+  {
+    m68k_unused_16_w(address,data);
+    return;
+  }
+
+  /* register offset */
+  int offset = (address >> 1) & 0x0F;
+
+  /* update internal register */
+  action_replay.regs[offset] = data;
+
+  /* decode patch value & address on exit */
+  if ((offset == 3) && (data == 0xffff))
+  {
+    /* patch data */
+    action_replay.data[0] = action_replay.regs[0];
+    action_replay.data[1] = action_replay.regs[4];
+    action_replay.data[2] = action_replay.regs[7];
+    action_replay.data[3] = action_replay.regs[10];
+
+    /* patch address */
+    action_replay.addr[0] = (action_replay.regs[1]   | ((action_replay.regs[2]   & 0x7f00) << 8)) << 1;
+    action_replay.addr[1] = (action_replay.regs[5]   | ((action_replay.regs[6]   & 0x7f00) << 8)) << 1;
+    action_replay.addr[2] = (action_replay.regs[8]   | ((action_replay.regs[9]   & 0x7f00) << 8)) << 1;
+    action_replay.addr[3] = (action_replay.regs[11]  | ((action_replay.regs[12]  & 0x7f00) << 8)) << 1;
+
+    int i;
+    for (i=0; i<4; i++)
+    {
+      offset = action_replay.addr[i] >> 16;
+
+      /* ROM area */
+      if (offset < 0x40)
+      {
+        /* store old ROM value */
+        action_replay.old[i] = *(uint16 *)(cart_rom + action_replay.addr[i]);
+      }
+      /* Work RAM area */
+      else if (offset >= 0xe0)
+      {
+        /* patch RAM */
+        *(uint16 *)(work_ram + (action_replay.addr[i] & 0xffff)) = action_replay.data[i];
+
+        /* setup handlers */
+        m68k_memory_map[offset].write8  = ar_write_byte;
+        m68k_memory_map[offset].write16 = ar_write_word;
+      }
+    }
+
+    for (i=0; i<4; i++)
+    {
+      offset = action_replay.addr[i] >> 16;
+
+      /* ROM area */
+      if (offset < 0x40)
+      {
+        /* patch ROM */
+        *(uint16 *)(cart_rom + action_replay.addr[i]) = action_replay.data[i];;
+      }
+    }
+
+    /* reads are mapped to Cartridge ROM */
+    m68k_memory_map[0].base = cart_rom;
+  }
+}
+#endif

source/cart_hw/ggenie.c

@@ -64,6 +64,10 @@ void ggenie_init(void)
   }
 #endif
 
+  /* enable registers write */
+  m68k_memory_map[0].write8   = ggenie_write_byte;
+  m68k_memory_map[0].write16  = ggenie_write_word;
+
   /* set flag */
   ggenie.enabled = 1;
 }
@@ -86,12 +90,8 @@ void ggenie_reset(void)
   memset(ggenie.data,0,sizeof(ggenie.data));
   memset(ggenie.addr,0,sizeof(ggenie.addr));
 
-  /* default slot mapping */
+  /* slot 0 is mapped to Game Genie ROM */
-  /* reads  are mapped to Game Genie ROM */
-  /* writes are mapped to Game Genie internal registers */
   m68k_memory_map[0].base     = ggenie.rom;
-  m68k_memory_map[0].write8   = ggenie_write_byte;
-  m68k_memory_map[0].write16  = ggenie_write_word;
   m68k_memory_map[0].read16   = NULL;
 }
 

source/gx/gui/menu.c

@@ -935,6 +935,7 @@ static void systemmenu ()
         else sprintf (items[4].text, "Lock-On: OFF");
         if (genromsize || (config.bios_enabled == 3)) 
         {
+          system_reset (); /* clear any GG patches */
           system_init ();
           audio_init(48000);
           system_reset ();

source/loadrom.c

@@ -347,6 +347,7 @@ void set_region ()
     if (c == 'U') country |= 4;
     else if (c == 'J') country |= 1;
     else if (c == 'E') country |= 8;
+    else if (c == 'K') country |= 1;
     else if (c < 16) country |= c;
     else if ((c >= '0') && (c <= '9')) country |= c - '0';
     else if ((c >= 'A') && (c <= 'F')) country |= c - 'A' + 10;

source/mem68k.c

@@ -155,7 +155,7 @@ uint32 z80_read_byte(uint32 address)
       return zram[address & 0x1fff];
   }
 }
-            
+
 uint32 z80_read_word(uint32 address)
 {
   if (zbusack) return m68k_read_bus_16(address);
@@ -179,7 +179,7 @@ uint32 z80_read_word(uint32 address)
     }
   }
 }
-      
+
 void z80_write_byte(uint32 address, uint32 data)
 {
   if (zbusack)
@@ -254,9 +254,9 @@ void z80_write_word(uint32 address, uint32 data)
   }
 }
 
-        
+
 /******* I/O & CTRL ******************************************/
-          
+
 uint32 ctrl_io_read_byte(uint32 address)
 {
   switch ((address >> 8) & 0xff)
@@ -325,14 +325,14 @@ uint32 ctrl_io_read_word(uint32 address)
     case 0x41:  /* BOOTROM */
     case 0x44:  /* RADICA */
       return m68k_read_bus_16(address);
-    
+
     default:  /* Invalid address */
       return m68k_lockup_r_16(address);
   }
 }
 
 void ctrl_io_write_byte(uint32 address, uint32 data)
-{        
+{
   switch ((address >> 8) & 0xff)
   {
     case 0x00:  /* I/O chip */
@@ -358,7 +358,7 @@ void ctrl_io_write_byte(uint32 address, uint32 data)
       if (address & 1)
       {
         m68k_memory_map[0].base = (data & 1) ?  default_rom : bios_rom;
-    
+
         /* autodetect BIOS ROM file */
         if (!(config.bios_enabled & 2))
         {
@@ -385,22 +385,22 @@ void ctrl_io_write_byte(uint32 address, uint32 data)
 }
 
 void ctrl_io_write_word(uint32 address, uint32 data)
-{        
+{
   switch ((address >> 8) & 0xff)
   {
     case 0x00:  /* I/O chip */
       if (address & 0xe0) m68k_unused_16_w (address, data);
       else io_write ((address >> 1) & 0x0f, data & 0xff);
       return;
-        
+
     case 0x11:  /* BUSREQ */
       gen_busreq_w ((data >> 8) & 1);
       return;
-        
+
     case 0x12:  /* RESET */
       gen_reset_w ((data >> 8) & 1);
       return;
-            
+
     case 0x50:  /* SVP REGISTERS */
       if (svp)
       {
@@ -433,7 +433,7 @@ void ctrl_io_write_word(uint32 address, uint32 data)
         memset(cart_rom, 0, genromsize);
       }
       return;
-          
+
     case 0x10:  /* MEMORY MODE */
     case 0x20:  /* MEGA-CD */
     case 0x40:  /* TMSS */
@@ -456,20 +456,20 @@ uint32 vdp_read_byte(uint32 address)
   {
     case 0x00:  /* DATA */
       return (vdp_data_r() >> 8);
-          
+
     case 0x01:  /* DATA */
       return (vdp_data_r() & 0xff);
-  
+
     case 0x04:  /* CTRL */
       return ((m68k_read_pcrelative_8(REG_PC) & 0xfc) | ((vdp_ctrl_r() >> 8) & 3));
 
     case 0x05:  /* CTRL */
       return (vdp_ctrl_r() & 0xff);
-          
+
     case 0x08:  /* HVC */
     case 0x0c:
       return (vdp_hvc_r() >> 8);
-          
+
     case 0x09:  /* HVC */
     case 0x0d:
       return (vdp_hvc_r() & 0xff);
@@ -491,14 +491,14 @@ uint32 vdp_read_word(uint32 address)
   {
     case 0x00:  /* DATA */
       return vdp_data_r();
-            
+
     case 0x04:  /* CTRL */
       return ((vdp_ctrl_r() & 0x3FF) | (m68k_read_pcrelative_16(REG_PC) & 0xFC00));
-          
+
     case 0x08:  /* HVC */
     case 0x0c:
       return vdp_hvc_r();
-          
+
     case 0x18:  /* Unused */
     case 0x1c:
       return m68k_read_bus_16(address);
@@ -525,7 +525,7 @@ void vdp_write_byte(uint32 address, uint32 data)
       if (address & 1) psg_write(0, data);
       else m68k_unused_8_w(address, data);
       return;
-              
+
     case 0x18: /* Unused */
       m68k_unused_8_w(address, data);
       return;
@@ -616,8 +616,8 @@ uint32 pico_read_byte(uint32 address)
     case 0x12:
     case 0x13:
       return 0x80; /* TODO */
-        
+
-        default:
+    default:
       return m68k_read_bus_8(address);
   }
 }

source/membnk.c

@@ -47,7 +47,7 @@ uint32 zbank_lockup_r(uint32 address)
 #ifdef LOGERROR
   error("Z80 bank lockup read %06X\n", address);
 #endif
-   gen_running = config.force_dtack;
+  gen_running = config.force_dtack;
   return 0xFF;
 }
 
@@ -56,7 +56,7 @@ void zbank_lockup_w(uint32 address, uint32 data)
 #ifdef LOGERROR
   error("Z80 bank lockup write %06X = %02X\n", address, data);
 #endif
-   gen_running = config.force_dtack;
+  gen_running = config.force_dtack;
 }
 
 /* I/O & Control registers */

source/memz80.c

@@ -47,7 +47,7 @@ static inline void z80_lockup_w(unsigned int address, unsigned int data)
 #ifdef LOGERROR
   error("Z80 lockup write %04X = %02X\n", address, data);
 #endif
-   gen_running = config.force_dtack;
+  gen_running = config.force_dtack;
 }
 
 static inline unsigned int z80_lockup_r(unsigned int address)
@@ -67,13 +67,13 @@ static inline unsigned int z80_vdp_r(unsigned int address)
   {
     case 0x00:  /* DATA */
       return (vdp_data_r() >> 8);
-          
+
     case 0x01:  /* DATA */
       return (vdp_data_r() & 0xff);
 
     case 0x04:  /* CTRL */
       return (0xfc | ((vdp_ctrl_r() >> 8) & 3));
-          
+
     case 0x05:  /* CTRL */
       return (vdp_ctrl_r() & 0xff);