mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-28 12:11:50 +01:00
.added PRO Action Replay hardware emulation
This commit is contained in:
ekeeke31
parent
39eaa853be
commit
e0aa2d00c8
299
source/cart_hw/areplay.c
Normal file
299
source/cart_hw/areplay.c
Normal file
@ -0,0 +1,299 @@
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/****************************************************************************
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* Genesis Plus
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* Action Replay / Pro Action Replay emulation
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*
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* Copyright (C) 2009 Eke-Eke (GCN/Wii port)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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***************************************************************************/
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#include "shared.h"
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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static struct
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{
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uint8 enabled;
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uint8 status;
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uint8 *rom;
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uint8 *ram;
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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static void ar_write_regs(uint32 address, uint32 data);
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static void ar_write_regs_2(uint32 address, uint32 data);
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static void ar_write_ram_8(uint32 address, uint32 data);
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void areplay_init(void)
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{
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memset(&action_replay,0,sizeof(action_replay));
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if (cart.romsize > 0x800000) return;
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/* Open Action Replay ROM */
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FILE *f = fopen(AR_ROM,"rb");
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if (!f) return;
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/* store Action replay ROM + RAM above cartridge ROM + SRAM */
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action_replay.rom = cart.rom + 0x800000;
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action_replay.ram = cart.rom + 0x810000;
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/* ROM size */
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fseek(f, 0, SEEK_END);
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int size = ftell(f);
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fseek(f, 0, SEEK_SET);
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/* detect Action Replay board type */
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switch (size)
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{
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case 0x8000:
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{
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/* normal Action Replay (32K) */
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action_replay.enabled = TYPE_AR;
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/* internal registers mapped at $010000-$01ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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break;
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}
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case 0x10000:
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case 0x20000:
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{
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/* read Stack Pointer */
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uint8 sp[4];
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fread(&sp, 4, 1, f);
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fseek(f, 0, SEEK_SET);
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/* Detect board version */
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if (sp[1] == 0x42)
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{
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/* PRO Action Replay 1 (64/128K) */
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action_replay.enabled = TYPE_PRO1;
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/* internal registers mapped at $010000-$01ffff */
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m68k_memory_map[0x01].write16 = ar_write_regs;
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}
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else if (sp[1] == 0x60)
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{
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/* PRO Action Replay 2 (64K) */
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action_replay.enabled = TYPE_PRO2;
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/* internal registers mapped at $100000-$10ffff */
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m68k_memory_map[0x10].write16 = ar_write_regs_2;
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}
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/* internal RAM (64k), mapped at $420000-$42ffff or $600000-$60ffff */
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if (action_replay.enabled)
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{
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m68k_memory_map[sp[1]].base = action_replay.ram;
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m68k_memory_map[sp[1]].read8 = NULL;
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m68k_memory_map[sp[1]].read16 = NULL;
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m68k_memory_map[sp[1]].write8 = ar_write_ram_8;
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m68k_memory_map[sp[1]].write16 = NULL;
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}
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break;
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}
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default:
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{
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break;
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}
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}
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if (action_replay.enabled)
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{
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/* Load ROM */
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int i = 0;
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while (i < size)
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{
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fread(action_replay.rom+i,0x1000,1,f);
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i += 0x1000;
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}
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#ifdef LSB_FIRST
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/* Byteswap ROM */
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uint8 temp;
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for(i = 0; i < size; i += 2)
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{
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temp = action_replay.rom[i];
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action_replay.rom[i] = action_replay.rom[i+1];
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action_replay.rom[i+1] = temp;
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}
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#endif
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}
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fclose(f);
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}
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void areplay_shutdown(void)
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{
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/* clear existing patches */
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areplay_set_status(AR_SWITCH_OFF);
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/* disable device by default */
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action_replay.enabled = 0;
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}
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void areplay_reset(int hard_reset)
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{
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if (action_replay.enabled)
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{
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/* reset internal registers */
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memset(action_replay.regs, 0, sizeof(action_replay.regs));
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memset(action_replay.old, 0, sizeof(action_replay.old));
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memset(action_replay.data, 0, sizeof(action_replay.data));
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memset(action_replay.addr, 0, sizeof(action_replay.addr));
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/* by default, internal ROM is mapped at $000000-$00FFFF */
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m68k_memory_map[0].base = action_replay.rom;
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/* internal RAM is cleared on power ON */
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if (hard_reset)
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{
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memset(action_replay.ram,0xff,0x10000);
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}
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}
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}
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int areplay_get_status(void)
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{
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if (action_replay.enabled)
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{
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return action_replay.status;
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}
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return -1;
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}
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void areplay_set_status(int status)
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{
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if (action_replay.enabled)
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{
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/* no Trainer mode for normal Action Replay */
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if ((action_replay.enabled == TYPE_AR) && (status == AR_SWITCH_TRAINER))
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{
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status = AR_SWITCH_OFF;
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}
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/* check status changes */
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switch (status)
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{
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case AR_SWITCH_OFF:
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case AR_SWITCH_TRAINER:
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{
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/* check that patches were previously enabled */
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if (action_replay.status == AR_SWITCH_ON)
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{
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/* restore original data */
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*(uint16 *)(cart.rom + action_replay.addr[0]) = action_replay.old[0];
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*(uint16 *)(cart.rom + action_replay.addr[1]) = action_replay.old[1];
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*(uint16 *)(cart.rom + action_replay.addr[2]) = action_replay.old[2];
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*(uint16 *)(cart.rom + action_replay.addr[3]) = action_replay.old[3];
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}
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break;
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}
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case AR_SWITCH_ON:
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{
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/* check that patches were previously disabled */
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if (action_replay.status != AR_SWITCH_ON)
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{
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/* decode patch data */
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action_replay.data[0] = action_replay.regs[0];
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action_replay.data[1] = action_replay.regs[4];
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action_replay.data[2] = action_replay.regs[7];
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action_replay.data[3] = action_replay.regs[10];
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/* decode patch address ($000000-$7fffff) */
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action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x3f00) << 8)) << 1;
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action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x3f00) << 8)) << 1;
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action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x3f00) << 8)) << 1;
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action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x3f00) << 8)) << 1;
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/* save original data */
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action_replay.old[0] = *(uint16 *)(cart.rom + action_replay.addr[0]);
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action_replay.old[1] = *(uint16 *)(cart.rom + action_replay.addr[1]);
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action_replay.old[2] = *(uint16 *)(cart.rom + action_replay.addr[2]);
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action_replay.old[3] = *(uint16 *)(cart.rom + action_replay.addr[3]);
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/* patch new data */
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*(uint16 *)(cart.rom + action_replay.addr[0]) = action_replay.data[0];
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*(uint16 *)(cart.rom + action_replay.addr[1]) = action_replay.data[1];
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*(uint16 *)(cart.rom + action_replay.addr[2]) = action_replay.data[2];
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*(uint16 *)(cart.rom + action_replay.addr[3]) = action_replay.data[3];
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}
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break;
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}
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default:
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{
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return;
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}
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}
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/* update status */
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action_replay.status = status;
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}
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}
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static void ar_write_regs(uint32 address, uint32 data)
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{
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/* register offset */
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int offset = (address & 0xffff) >> 1;
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if (offset > 12)
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{
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m68k_unused_16_w(address,data);
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return;
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}
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/* update internal register */
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action_replay.regs[offset] = data;
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/* MODE register */
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if (action_replay.regs[3] == 0xffff)
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{
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/* check switch status */
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if (action_replay.status == AR_SWITCH_ON)
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{
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/* reset existing patches */
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areplay_set_status(AR_SWITCH_OFF);
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areplay_set_status(AR_SWITCH_ON);
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}
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/* enable Cartridge ROM */
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m68k_memory_map[0].base = cart.rom;
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}
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}
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static void ar_write_regs_2(uint32 address, uint32 data)
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{
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/* enable Cartridge ROM */
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if (((address & 0xff) == 0x78) && (data == 0xffff))
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{
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m68k_memory_map[0].base = cart.rom;
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}
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}
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static void ar_write_ram_8(uint32 address, uint32 data)
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{
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/* byte writes are handled as word writes, with LSB duplicated in MSB (/LWR is not used) */
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*(uint16 *)(action_replay.ram + (address & 0xfffe)) = (data | (data << 8));
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}
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@ -19,12 +19,17 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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***************************************************************************/
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***************************************************************************/
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#ifndef _DATEL_H_
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#ifndef _AREPLAY_H_
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#define _DATEL_H_
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#define _AREPLAY_H_
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extern void datel_init(void);
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#define AR_SWITCH_OFF (0)
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extern void datel_shutdown(void);
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#define AR_SWITCH_ON (1)
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extern void datel_reset(int hard_reset);
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#define AR_SWITCH_TRAINER (2)
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extern void datel_switch(int enable);
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extern void areplay_init(void);
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extern void areplay_shutdown(void);
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extern void areplay_reset(int hard_reset);
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extern void areplay_set_status(int status);
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extern int areplay_get_status(void);
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#endif
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#endif
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@ -302,9 +302,9 @@ void cart_hw_init()
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LOCK-ON
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LOCK-ON
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***********************************************/
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***********************************************/
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/* clear all existing patches */
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/* clear existing patches */
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ggenie_shutdown();
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ggenie_shutdown();
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datel_shutdown();
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areplay_shutdown();
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/* initialize extra hardware */
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/* initialize extra hardware */
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cart.lock_on = 0;
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cart.lock_on = 0;
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@ -315,7 +315,7 @@ void cart_hw_init()
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break;
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break;
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case TYPE_AR:
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case TYPE_AR:
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datel_init();
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areplay_init();
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break;
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break;
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case TYPE_SK:
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case TYPE_SK:
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@ -477,7 +477,7 @@ void cart_hw_reset()
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break;
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break;
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case TYPE_AR:
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case TYPE_AR:
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datel_reset(1);
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areplay_reset(1);
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break;
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break;
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case TYPE_SK:
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case TYPE_SK:
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@ -1,333 +0,0 @@
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/****************************************************************************
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* Genesis Plus
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* DATEL Action Replay / Pro Action Replay emulation
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*
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* Copyright (C) 2009 Eke-Eke (GCN/Wii port)
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*
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* This program is free software; you can redistribute it and/or modify
|
|
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* it under the terms of the GNU General Public License as published by
|
|
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* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
||||||
***************************************************************************/
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#include "shared.h"
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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struct
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|
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{
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uint8 enabled;
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uint8 *rom;
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uint8 *ram;
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|
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
|
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uint32 addr[4];
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} action_replay;
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static void wram_write_byte(uint32 address, uint32 data);
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|
||||||
static void wram_write_word(uint32 address, uint32 data);
|
|
||||||
static void ar_write_regs(uint32 address, uint32 data);
|
|
||||||
static void ar_write_regs_pro2(uint32 address, uint32 data);
|
|
||||||
|
|
||||||
void datel_init(void)
|
|
||||||
{
|
|
||||||
memset(&action_replay,0,sizeof(action_replay));
|
|
||||||
|
|
||||||
/* Open Action Replay ROM */
|
|
||||||
FILE *f = fopen(AR_ROM,"rb");
|
|
||||||
if (!f)
|
|
||||||
return;
|
|
||||||
|
|
||||||
/* store Action replay ROM + RAM above cartridge ROM + SRAM */
|
|
||||||
if (cart.romsize > 0x600000) return;
|
|
||||||
action_replay.rom = cart.rom + 0x600000;
|
|
||||||
action_replay.ram = cart.rom + 0x610000;
|
|
||||||
|
|
||||||
/* ROM size */
|
|
||||||
fseek(f, 0, SEEK_END);
|
|
||||||
int size = ftell(f);
|
|
||||||
|
|
||||||
/* Detect Action Replay type */
|
|
||||||
switch (size)
|
|
||||||
{
|
|
||||||
case 0x8000: /* ACTION REPLAY (32K) */
|
|
||||||
{
|
|
||||||
action_replay.enabled = TYPE_AR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
case 0x10000: /* PRO ACTION REPLAY 2 (64K) */
|
|
||||||
{
|
|
||||||
action_replay.enabled = TYPE_PRO2;
|
|
||||||
|
|
||||||
/* RAM (64k) mapped at $600000-$60ffff */
|
|
||||||
m68k_memory_map[0x60].base = action_replay.ram;
|
|
||||||
m68k_memory_map[0x60].read8 = NULL;
|
|
||||||
m68k_memory_map[0x60].read16 = NULL;
|
|
||||||
m68k_memory_map[0x60].write8 = NULL;
|
|
||||||
m68k_memory_map[0x60].write16 = NULL;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
case 0x20000: /* PRO ACTION REPLAY (128K) */
|
|
||||||
{
|
|
||||||
action_replay.enabled = TYPE_PRO1;
|
|
||||||
|
|
||||||
/* RAM (64k) mapped at $420000-$42ffff */
|
|
||||||
m68k_memory_map[0x42].base = action_replay.ram;
|
|
||||||
m68k_memory_map[0x42].read8 = NULL;
|
|
||||||
m68k_memory_map[0x42].read16 = NULL;
|
|
||||||
m68k_memory_map[0x42].write8 = NULL;
|
|
||||||
m68k_memory_map[0x42].write16 = NULL;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
default:
|
|
||||||
{
|
|
||||||
fclose(f);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Load ROM */
|
|
||||||
fseek(f, 0, SEEK_SET);
|
|
||||||
int i = 0;
|
|
||||||
while (i < size)
|
|
||||||
{
|
|
||||||
fread(action_replay.rom+i,0x1000,1,f);
|
|
||||||
i += 0x1000;
|
|
||||||
}
|
|
||||||
fclose(f);
|
|
||||||
|
|
||||||
#ifdef LSB_FIRST
|
|
||||||
/* Byteswap ROM */
|
|
||||||
uint8 temp;
|
|
||||||
for(i = 0; i < size; i += 2)
|
|
||||||
{
|
|
||||||
temp = action_replay.rom[i];
|
|
||||||
action_replay.rom[i] = action_replay.rom[i+1];
|
|
||||||
action_replay.rom[i+1] = temp;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void datel_shutdown(void)
|
|
||||||
{
|
|
||||||
if (action_replay.enabled)
|
|
||||||
{
|
|
||||||
datel_switch(0);
|
|
||||||
action_replay.enabled = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void datel_reset(int hard_reset)
|
|
||||||
{
|
|
||||||
/* reset external mapping */
|
|
||||||
switch (action_replay.enabled)
|
|
||||||
{
|
|
||||||
case TYPE_AR:
|
|
||||||
|
|
||||||
/* internal registers mapped at $010000-$01ffff */
|
|
||||||
m68k_memory_map[0x01].write16 = ar_write_regs;
|
|
||||||
|
|
||||||
/* internal ROM mapped at $000000-$00ffff */
|
|
||||||
m68k_memory_map[0].base = action_replay.rom;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case TYPE_PRO2:
|
|
||||||
|
|
||||||
/* internal registers mapped at $100000-$10ffff */
|
|
||||||
m68k_memory_map[0x10].write16 = ar_write_regs_pro2;
|
|
||||||
|
|
||||||
/* internal ROM mapped at $000000-$00ffff */
|
|
||||||
m68k_memory_map[0].base = action_replay.rom;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case TYPE_PRO1:
|
|
||||||
|
|
||||||
/* internal registers mapped at $010000-$01ffff */
|
|
||||||
m68k_memory_map[0x01].write16 = ar_write_regs;
|
|
||||||
|
|
||||||
/* internal ROM mapped at $000000-$01ffff */
|
|
||||||
m68k_memory_map[0].base = action_replay.rom;
|
|
||||||
m68k_memory_map[1].base = action_replay.rom + 0x10000;
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* clear existing codes */
|
|
||||||
datel_switch(0);
|
|
||||||
|
|
||||||
/* reset internal state */
|
|
||||||
memset(action_replay.regs,0,sizeof(action_replay.regs));
|
|
||||||
memset(action_replay.old,0,sizeof(action_replay.old));
|
|
||||||
memset(action_replay.data,0,sizeof(action_replay.data));
|
|
||||||
memset(action_replay.addr,0,sizeof(action_replay.addr));
|
|
||||||
|
|
||||||
/* clear RAM on hard reset only */
|
|
||||||
if (hard_reset)
|
|
||||||
memset(action_replay.ram,0,0x10000);
|
|
||||||
}
|
|
||||||
|
|
||||||
void datel_switch(int enable)
|
|
||||||
{
|
|
||||||
int i,use_wram = 0;
|
|
||||||
if (enable)
|
|
||||||
{
|
|
||||||
for (i=0; i<4; i++)
|
|
||||||
{
|
|
||||||
if (action_replay.data[i])
|
|
||||||
{
|
|
||||||
/* store old values & patch new values */
|
|
||||||
if (action_replay.addr[i] < 0x400000)
|
|
||||||
{
|
|
||||||
action_replay.old[i] = *(uint16 *)(cart.rom + (action_replay.addr[i]&~1));
|
|
||||||
*(uint16 *)(cart.rom + (action_replay.addr[i]&~1)) = action_replay.data[i];
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
use_wram = 1;
|
|
||||||
action_replay.old[i] = *(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe));
|
|
||||||
if (action_replay.data[i] & 0xff00)
|
|
||||||
*(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe)) = action_replay.data[i];
|
|
||||||
else
|
|
||||||
WRITE_BYTE(work_ram, (action_replay.addr[i]&0xfffe) + 1, action_replay.data[i] & 0xff);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (use_wram)
|
|
||||||
{
|
|
||||||
/* use specific WRAM write handlers */
|
|
||||||
for (i=0xe0; i<0x100; i++)
|
|
||||||
{
|
|
||||||
m68k_memory_map[i].write8 = wram_write_byte;
|
|
||||||
m68k_memory_map[i].write16 = wram_write_word;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* restore original data */
|
|
||||||
for (i=0; i<4; i++)
|
|
||||||
{
|
|
||||||
if (action_replay.data[i])
|
|
||||||
{
|
|
||||||
if (action_replay.addr[i] < 0x400000)
|
|
||||||
*(uint16 *)(cart.rom + action_replay.addr[i]) = action_replay.old[i];
|
|
||||||
else
|
|
||||||
*(uint16 *)(work_ram + (action_replay.addr[i]&0xfffe)) = action_replay.old[i];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* default WRAM write handlers */
|
|
||||||
for (i=0xe0; i<0x100; i++)
|
|
||||||
{
|
|
||||||
m68k_memory_map[i].write8 = NULL;
|
|
||||||
m68k_memory_map[i].write16 = NULL;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void wram_write_byte(uint32 address, uint32 data)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
for (i=0; i<4; i++)
|
|
||||||
{
|
|
||||||
if (action_replay.data[i])
|
|
||||||
{
|
|
||||||
if ((address & 0xfffe) == (action_replay.addr[i] & 0xfffe))
|
|
||||||
{
|
|
||||||
WRITE_BYTE(&action_replay.old[i], address & 1, data);
|
|
||||||
if (action_replay.data[i] & 0xff00)
|
|
||||||
return;
|
|
||||||
if ((address & 0xffff) == ((action_replay.addr[i]&0xfffe) + 1))
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
WRITE_BYTE(work_ram, address & 0xffff, data);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void wram_write_word(uint32 address, uint32 data)
|
|
||||||
{
|
|
||||||
*(uint16 *)(work_ram + (address & 0xffff)) = data;
|
|
||||||
|
|
||||||
int i;
|
|
||||||
for (i=0; i<4; i++)
|
|
||||||
{
|
|
||||||
if (action_replay.data[i])
|
|
||||||
{
|
|
||||||
if ((address & 0xffff) == (action_replay.addr[i] & 0xfffe))
|
|
||||||
{
|
|
||||||
action_replay.old[i] = data;
|
|
||||||
if (action_replay.data[i] & 0xff00)
|
|
||||||
*(uint16 *)(work_ram + (address & 0xfffe)) = action_replay.data[i];
|
|
||||||
else
|
|
||||||
WRITE_BYTE(work_ram, (action_replay.addr[i] & 0xfffe) + 1, action_replay.data[i]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ar_write_regs(uint32 address, uint32 data)
|
|
||||||
{
|
|
||||||
/* register offset */
|
|
||||||
int offset = (address & 0xffff) >> 1;
|
|
||||||
if (offset > 12)
|
|
||||||
{
|
|
||||||
m68k_unused_16_w(address,data);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* update internal register */
|
|
||||||
action_replay.regs[offset] = data;
|
|
||||||
|
|
||||||
/* exit program */
|
|
||||||
if (action_replay.regs[3] == 0xffff)
|
|
||||||
{
|
|
||||||
/* decode patch data */
|
|
||||||
action_replay.data[0] = action_replay.regs[0];
|
|
||||||
action_replay.data[1] = action_replay.regs[4];
|
|
||||||
action_replay.data[2] = action_replay.regs[7];
|
|
||||||
action_replay.data[3] = action_replay.regs[10];
|
|
||||||
|
|
||||||
/* decode patch address */
|
|
||||||
action_replay.addr[0] = (action_replay.regs[1] | ((action_replay.regs[2] & 0x7f00) << 8)) << 1;
|
|
||||||
action_replay.addr[1] = (action_replay.regs[5] | ((action_replay.regs[6] & 0x7f00) << 8)) << 1;
|
|
||||||
action_replay.addr[2] = (action_replay.regs[8] | ((action_replay.regs[9] & 0x7f00) << 8)) << 1;
|
|
||||||
action_replay.addr[3] = (action_replay.regs[11] | ((action_replay.regs[12] & 0x7f00) << 8)) << 1;
|
|
||||||
|
|
||||||
/* enable Cartridge ROM */
|
|
||||||
m68k_memory_map[0].base = cart.rom;
|
|
||||||
m68k_memory_map[1].base = cart.rom + ((1<<16) & cart.mask);
|
|
||||||
|
|
||||||
/* disable internal registers (?) */
|
|
||||||
m68k_memory_map[0x01].write16 = m68k_unused_16_w;
|
|
||||||
|
|
||||||
/* enable patches */
|
|
||||||
datel_switch(1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ar_write_regs_pro2(uint32 address, uint32 data)
|
|
||||||
{
|
|
||||||
/* enable Cartridge ROM */
|
|
||||||
if (((address & 0xff) == 0x78) && (data == 0xffff))
|
|
||||||
m68k_memory_map[0].base = cart.rom;
|
|
||||||
}
|
|
||||||
@ -168,9 +168,11 @@ void gen_softreset(int state)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Reset Pro Action Replay (required in Trainer mode) */
|
/* Reset PRO Action Replay (if switch is in TRAINER position) */
|
||||||
if (config.lock_on == TYPE_AR)
|
if (areplay_get_status() == AR_SWITCH_TRAINER)
|
||||||
datel_reset(0);
|
{
|
||||||
|
areplay_reset(0);
|
||||||
|
}
|
||||||
|
|
||||||
/* 68k & Z80 could restart anywhere in VDP frame (Bonkers, Eternal Champions, X-Men 2) */
|
/* 68k & Z80 could restart anywhere in VDP frame (Bonkers, Eternal Champions, X-Men 2) */
|
||||||
mcycles_68k = mcycles_z80 = (uint32)((MCYCLES_PER_LINE * lines_per_frame) * ((double)rand() / (double)RAND_MAX));
|
mcycles_68k = mcycles_z80 = (uint32)((MCYCLES_PER_LINE * lines_per_frame) * ((double)rand() / (double)RAND_MAX));
|
||||||
|
|||||||
@ -27,7 +27,7 @@
|
|||||||
#include "eeprom.h"
|
#include "eeprom.h"
|
||||||
#include "sram.h"
|
#include "sram.h"
|
||||||
#include "ggenie.h"
|
#include "ggenie.h"
|
||||||
#include "datel.h"
|
#include "areplay.h"
|
||||||
#include "svp.h"
|
#include "svp.h"
|
||||||
#include "osd.h"
|
#include "osd.h"
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user